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ADS5560EVM Schematic not accurate in datasheet

Other Parts Discussed in Thread: ADS5560EVM, ADS6149, ADS5560

I have a TI ADS5560EVM here that I am currently evaluating. Unfortunately, the schematics shown in the datasheet are a general set of schematics used as a baseline for many of TI's ADC EVM boards. The schematic shown is quite different than the actual board that we have. Where can I obtain the actual schematics for this board? This issue was mentioned in this post as well but schematics were not provided: http://e2e.ti.com/support/data_converters/high_speed_data_converters/f/68/p/51439/182634.aspx#182634

Any help would be very appreciated.

Thanks,

Neema

  • Hi,

    The ADS5560 EVM shares the same basic circuit board (and this schematics) as the ADS6149.  After the initial batch of ADS5560 EVM were built on the revision A circuit board we switched over to the revision B circuit board.  You can see which revision circuit board you have in the silkscreen on the EVM under the name of the EVM.  The product folder on the TI web has the User Guide for both the rev A and the rev B, and each User Guide has the schematics, bill of materials, and layout layers in the back of the User Guide.  Please see if one of these User Guides ( down the page, under Technical Documents) match your EVM, please.  One of them should. 

    http://focus.ti.com/docs/toolsw/folders/print/ads5560evm.html

    Regards,

    Richard P.

  • Found it there. Thanks!

  • Hi! I have Rev C and the manual found here: http://www.ti.com/litv/pdf/slau260 is not consistent with the module. Can you please update the manual?

  • I have the same problem as Bram mentioned in his recent post, with a newly purchased Rev C ADS5560 EVM board and no current schematic available from TI.  There must be a substantial change to this schematic too because upon preliminary investigation I discovered that J5 has pins 2,4,6, ... 38, 40 all grounded, whereas the schematic shows pins 1,3,5, ... etc. all grounded (connector odd to even ground pins swapped). This is my third post to the forum with earlier questions regarding getting 16-bits out on J5. No answers yet and I am currently in the process of designing an interface circuit.  I am wondering if the answers are supposed to come from other forum members like myself (the users) rather than the TI organization?  Can someone please let us know how if this forum is the correct place to post questions of this type?

  • Hello Jim,

    Apologies for the late reply. I have been traveling and have now just starting to catch up to all the E2E questions.

    The revision C of the schematic is attached. The major change on this revision is that we have replaced U15 from a 16-bit CMOS buffer to a 20-bit CMOS buffer. This allows us to route enough signal lines to account for the DCLK + 16-bit of Data line.

    We have started implementing design package zip files to include both schematic and layout files inside a zip file. This will allow us to update the design change files quickly without having to go through user's guide revisions. We will have the design package file uploaded to TI.com right away.

    Thanks for your patience and understanding.

    -Kang

    ADS61X9-556XEVM-SCH_C.pdf
  • Hello Kang,

    Thank you for the Rev C schematic.  I had already laid out the interface board, but fortunately can deal with connector J5 changes by modifying the schematic -- and only one jumper on the board.  I will keep checking for the design package zip files on the TI.com site as I will be needing that info after we finish testing our prototype setup.

    Best to you,

    Jim