ADS8685: Reset RVS state

Hiroaki Yuyama TED

Part Number: ADS8685

Dear, support team.

Data sheet of ADS8686 Figure 6-2. Asynchronous Reset Timing Diagram has RVS set to LO.
Are there any conditions for RVS to become HI?

There is "With CS low, the status of RVS depends on the output protocol selection." In the pin function item.

Delay time for POR reset: RST rising to RVS rising is Typ = 20msec, what is the maximum value?

Best Regards,
Hiroaki Yuyama

over 3 years ago

0 Dale Li over 3 years ago

TI__Mastermind 39545 points

Hi Hiroaki,

I'm traveling now and have a limited network access, I will get back to you as soon as I can. Thanks.

Regards,

Dale

0 Hiroaki Yuyama TED over 3 years ago in reply to Dale Li

Expert 1470 points

Dale-san
Thank you for your reply.

Please check when you get back to work.

Have a good travel.

Best Regards,
Hiroaki Yuyama

+1 Dale Li over 3 years ago in reply to Hiroaki Yuyama TED

TI__Mastermind 39545 points

Hi Hiroaki-san,

Thank you for your patience. The maximum value for td_RST_POR (Delay time for POR reset: RST rising to RVS rising) was not characterized. However, please see the following post for my measurement result on ADS8681EVM which is the core ADC in this ADC family and 1Msps version of ADS8685. This covers the information for your two questions.

ADS8699: RVS pin level doesn't go high from low after /RST transition from L to H

Best regards,

Dale

0 Hiroaki Yuyama TED over 3 years ago in reply to Dale Li

Expert 1470 points

Hi Dale-san
Thank you for your Answer.

Your answers and past links have helped solve our customer's problems.
Thanks to your cooperation, customer design will proceed.

Best Regards,
Hiroaki Yuyama

Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

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ADS8685: Reset RVS state