ADS5560EVM: ADS5560EVM

Hi Matthias,

The reason for the termination style on the EVM is explained in section 7.3.2.2 Example Driving Circuit. Which is the same circuit located on the EVM.

In order to take care of the sampling glitches, this type of termination style is preferred for best AC performance. 

Removing the terminations can help gain the signal back up however, there might be some differences in AC performance, ie - lower SFDR.

We can help you modify the input frontend if can understand more about your application. Is your application a time domain application or frequency domain application?

Regards,

Rob

Dear Rob,

thank you. We want to analyze a modulated burst as seen in the following pictures. This is the raw analog burst signal. In essence we want to perform an FFT, but also need the raw signal to help with calibration and debugging.

As soon as we connect the signal to the ADS5560EVM, input J6, it collapses and it looks like only the modulated frequency of the burst remains. We have to scale from 200mV/div down to 20mV/div.

I look forward to your answer, thanks,

Matthias

HI Matthias,

Thanks for the additional information. This helps.

What is the frequency of the pulse?  Between the extra termination on the frontend network and the transformers BW (0.250–750MHz) this might be the limitation here.

Also, do you need to DC couple the pulse into the ADC?

Please try this experiment, using your oscope, probe along the frontend network and see where the drop in signal strength occurs, this will help target the issue as well.

Next, see the pic below, I would make sure the following components are removed. And also replace C69/C68 as 0.1uF caps. If you look at the notes below, it seems they were changed to inductors.

Let me know if this helps.

Regards,

Rob