Hi All,
Hope AFE5828 work on Sync (half frame 1, half frame 0) , 111111000000 12bit
SPI set 12bit or 14bit is OK ,dclk output 360M or 420M
Register Sync (half frame 1, half frame 0) :
ADDR1:0014;//0000 0000 0001 0100
ADDR2:0080;//0000 0000 1000 0000// 0800 = half frame
ADDR3:1010;//0001 0000 0001 0000//12bit DIG_GAIN_EN=1
ADDR4:0000;//00 = 12-bit resolution
LVDS output still low
Best Regards,
Charlie