ADS7038: Linux kernel driver support of the ADS7038 chipset

Thanks Aaron.

Can we take referance of any TI ADS driver which is nearby similar in functionality?

Meantime, I will go through the C code given in the link shared.

Thanks & Regards,

Dhaval

Hi Dhaval,

I don't know that we have a Linux driver for a devices that's fairly similar to the ADS7038 but I know we do have a Linux driver for the ADS8688. There may need to be quite a bit of tweaking to do but I guess it would still be a starting point...

Regards,
Aaron Estrada

Thanks Aaron

I will try from my side with both approach.

Regards,

Dhaval

Hi Aaron,

I have gone through the C ref code for ADS7038 based on that I can see that

If CRC_EN is not set then,

    dataTx[0] = OPCODE_SETBIT; //OPCODE_RREG , OPCODE_WREG, OPCODE_CLRBIT
    dataTx[1] = address;
    dataTx[2] = bitMask;// or Data or (OPCODE_NULL in case of read operation)

In this way, 3byte need to send for any clear bit/set bit/read byte/write byte operation.

Same way, I have do in case of Linux kernel code as well.

Is my understanding correct?

If yes then can I use generic drivers/spi/spidev.c driver and spidev_test utility to send 3 byte in mention format to do the read/write operation over ADS7038.

One more thing, for proper use of ADS7038, we have to do following operation

1. Set bit 0(RST) of the GENERAL_CFG_ADDRESS (address 0x01) to 1

2. Set bit 0(BOR) of the SYSTEM_STATUS_ADDRESS(address 0x00) to 1

Is my understanding correct?

Thanks & Regards,

Dhaval

Hello Dhaval,

Your understanding on sending 3bytes for clear, set, read and write is correct. 

For address 0x01, bit 0 is the reset bit and I recommend setting this bit to x01 upon startup to ensure the device registers are in a default state. Address 0x00 bit 0, is more a status read. after reset, this bit is set to 1 and if there is a brown out event or power is cycled, this bit is set to 0. Since default value is 0x01, you can leave this bit in it's default state. 

Regards,

Aaron Estrada 

Hi Aaron,

Thanks a lot for all the support.

I am able to read and write to ADS7038.

Now, I am tring to read the ADC data in manual mode.

All register are already configure by default as Manual mode.

AIN0 is used as a default (If I have to change channel to get ADC data I have to use Configure desired Channel ID in MANUAL_CHID field.

Is my understanding correct?

As per the datasheet in section 8.3.9 Output Data Format and 8.4.2 Manual Mode and readData function in sample code,

I have to send <0x00, 0x00, 0x00> to read the ADC data.

Is my understanding correct?

If my understanding is not correct then what command to send to get ADC data from selected channel.

NOTE: I have seen that RECENT_CH0_LSB (0xA0)and RECENT_CH0_MSB (0xA1) register and similar other register for other channel but looks like they are helpful in automode.

Thanks & Regards,

Dhaval

Hi Dhaval,

You are correct in that the MANUAL_CHID is used to select the channel you wish to sample. If you wish to sample CH. 4, you will write 001b to the last 3 bits of that register. 

This device outputs the conversion result 2 cycles later for a selected channel. Figure 34 shows a good example of this. So in the first cycle, after CS goes LOW, you will select the desired channel to be sampled. The second cycle starts when CS goes LOW again. There, MUX is changed and actually starts sampling. The 3rd cycle, again starts with CS going low a 3rd time, will output conversion data on SDO. So there is a 2 cycle delay from when the channel is selected and when the conversion result is available. 

Regards,
Aaron