Other Parts Discussed in Thread: , LMK04828
We are experiencing a problem with an ADC32RF45 IC used in one of our production runs. We are using it in 12-bit bypass mode (LMFS = 82820) and sampling at 2.8 GSPS.
When enabling the 12-bit (LMFS = 82820) ramp pattern test, we are receiving the ramp data out of order. After further investigation, we have found that nothing is wrong with the data apart from the lane data being swapped. We are confident that the problem is not with our test setup, since we have used it to test many other ADC32RF45 ICs successfully (which includes verification of the the 12-bit ramp pattern).
During further investigation of the problem, we enabled the "long transport layer test pattern mode according to section 5.1.6.3 of the JESD204B specification" and verified that we can receive that test pattern data correctly. Thus, it seems that the reason for the ramp lane data being swapped lies inside the ADC32RF45.
Has anyone else experienced a problem with the ADC32RF45 ramp lane data being swapped, and if so, how does one correct this problem?
