Hi,
I am interested in using the ADC12DJ3200EVM to digitize a communication signal, the output of the ADC12DJ3200EVM: will be fed to an FPGA board.
Q1. Part of the system design i am interested in dithering ( changing by small amount dF ) the frequency of the clock of the ADC12DJ3200EVM (in few KHz) without affecting the digitized data signal going to the FPGA. can that be done digitally? or by tuning the Vtune of the oscillator (analog) and how do i do that and what are my limitations?
What i mean by analog is by applying a sinusoidal signal from a signal generator to some input port/pin of the ADC to "dither" the Main sampling clock of the ADC EVAL board?
Q2. I would like to change the delay of the clock (not the frequency) can i do it digitally? can i do it via analog? and how do i do that and what are my limitations?
Q3. For any of the above implementations, do i need to add any additional circuit or
-Sarmad Albanna, Ph.D.
Staff Optical Engineer
NGC- CA
