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ADS8860: Daisy-Chain Multiple converters five or more for SPI readout

Steve Chau
Prodigy 85 points
Part Number: ADS8860

In my application, five or more sensors are required to sample at the same instance (audio frequency single-ended).  Reference Figure 58 in the datasheet.  If I use five ADS8860, the DOUT frame size of 5 x 16 bits = 80 bits at an SCLK of 10MHz should be sufficient.   However,  MCU that I'm familiar with can only support SPI frame size of 8-16 bits.  Without a custom FPGA SPI implementation, it seems daisy-chain five or more ADS8860 would not be feasible.  Do you have any suggestions? or are you aware of any MCUs out there that can support this implementation? 

  • 0
    TI__Mastermind 22950 points

    Hello Steve,

    The primary support engineers are out on holiday break. I will notify them of this thread and they will get back to you as soon as they return. Please note that a response will likely not be given until early January. Thank you for you patience. 

    Regards,
    Aaron

  • 0 in reply to Aaron Estrada
    TI__Mastermind 39910 points

    Hello Steve,

    I am not aware of any MCU that can directly support an 80b SPI frame, but most processors can support 16b.  The typical approach is to use an IO pin to control the CONVST pin.  The rising edge of CONVST will start the conversion process.  After a conversion delay of 710nsec, you can then use the MCU SPI peripheral to transfer 5 separate 16b sub-frames while keeping the CONVST pin high.  In this case, SCLK will not be continuous during the 80b frame, with delays between each 16b transfer, but the ADS8860 will support this type of transfer.  After the 5x sub-frames (80 total SCLK falling edges), you can then pull CONVST low to end the transfer process.  Taking CONVST high again, with SCLK low, will start the next conversion.

    Regards,
    Keith Nicholas
    Precision ADC Applications