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Original question:

ADS1675REF: Fast ADC (>1MSPS) with low error (<0.5mV)

ADS8900BEVM-PDK: Fast ADC (>1MSPS) with low error (<0.5mV)

he dajiang
Prodigy 196 points
Part Number: ADS8900BEVM-PDK
Other Parts Discussed in Thread: ADS8900B, , THS4551

I want to test the EVM board without PHI, meaning directly communicate with the ADC chip with a STM32 MCU.

I was told here (https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1056122/ads1675ref-fast-adc-1msps-with-low-error-0-5mv/3913091?tisearch=e2e-sitesearch&keymatch=%20user%3A223776#3913091) that I need to apply power to DVDD and LDO_IN.

  1. According to the schematic, both power level should be 5.3V. Is it correct?
  2. Is there any requirement for the power supply for LDO_IN? I wonder if it is OK to draw power from power output pin from a STM32 G431 board.
  3. In the power schematic drawing, there are pings like TP12, 13, 14,15 and 16. How come there is no marking on the board.
  • +1
    TI__Mastermind 36240 points

    Hello,

    Yes, you need to apply power to both the DVDD and LDO_IN Test pads when not using the PHI data capture board.

    LDO_IN is the input to the linear regulator, with an output voltage set to 5.3V and used to power the on-board amplifiers and the analog section of the ADS8900B.  The input voltage, LDO_IN, should be set to 5.5V to 6.0V so that the regulator can operate correctly.

    DVDD is the logic level voltage and connects directly to the ADS8900B.  This voltage can range from 2.35V to 5.5V maximum.  Since this voltage sets the logic level, it is best to use the same supply provided by the STM32 board, assuming it meets the voltage range of the ADS8900B.  The rest of the IO signals are available on the header J4.

    According to the schematic, both power level should be 5.3V. Is it correct?

    DVDD should be set to the same voltage as the IO levels used on the STM32 board, anywhere in the range from 2.35V to 5.5V.

    LDO_IN should be set from 5.5V to 6.0V for proper operation of the regulator.

    Is there any requirement for the power supply for LDO_IN? I wonder if it is OK to draw power from power output pin from a STM32 G431 board.

    LDO_IN will draw about 20mA of current, and can be provided by an external lab supply, or supplied from the STM32 board as long as the voltage is in the range of 5.5V to 6.0V.

    In the power schematic drawing, there are pings like TP12, 13, 14,15 and 16. How come there is no marking on the board.

    The labels on the board correspond to the following TPx reference designators:

    TP13: LDO_IN (net name LDO_IN_5V5)

    TP12: AGND (or system ground)

    TP14: 5.3V (regulated output of the linear regulator, used to power the amplifiers and the ADC analog section.  Do not connect an external supply to this test point.)

    TP15: DVDD (digital supply for logic level, net name EVM_DVDD)

    TP16: ID Power (power for the on-board EEPROM, not needed when using without PHI.  Do not connect an external supply to this test point.)

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Thank you Keith for your clear and thorough answer.

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    We try to read DIE_ID_REG (0x00) to see if SPI works.

    Below is my code based on Table 2 Supported Commands in the datasheet.

    	/*
	 * B[21:17] | B[16:8]         | B[7:0]       | CMD ACRONYM |  COMMAND DESCRIPTION
	 * 10001    | <9-bit address> | 00000000     | RD_REG      | Read contents from the <9-bit address>
	 * 10010    | <9-bit address> | <8-bit data> | WR_REG      | Write <8-bit data> to the <9-bit address>
	 *
	 * We try to read DIE_ID_REG 0x00 to see if SPI works.
	 */
  //uint8_t wr_cmd = 0B10010;  // write command
  uint8_t rd_cmd = 0B10001;  // read command
  uint8_t reg_addr = 0B0; // register address. DIE_ID_REG 0x0 default value is 0x8
  uint8_t data = 0B0;
  aTxBuffer[2] = rd_cmd << 1;
  aTxBuffer[1] = reg_addr;
  aTxBuffer[0] = data;

    Overall there are 3 bytes to send, I wonder I should send B[21:17] first or B[7:0] first. 

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    When sending commands to ADS8900B, the MSB is sent first, with the LSB sent last.  In your case, you should send B[21:17] first, followed by B[16:8], and finally B[7:0] last.

    Assuming you are using the default SPI-00-S protocol (power-up or reset state), Figure 52 shows more details.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    I got your point. 

    I have another question: my SPI driver's transmission unit is byte. Here for 8900, the command has only 22 bits. I wonder how I should construct my command.

    For example, if I want to read value (4 bytes) from register 0, I guess I need at least 6 bytes of clock cycles: first 2 bytes are for command type B[21:17] and register address B[16:8], the rest 4 are for data. Is it correct? 

    Do you any working code for me to refer to?

    And which register stores the ADC result? It is not mentioned in the Register Map. Or did I miss sth.?

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    In order to read from register 0, you need to send two SPI frames.  Since you are using an 8b transfer unit, each SPI frame can be set to 24b total.  Since the command is only 22b, you should pad two 0's at the beginning of the frame, and then follow with the 22b command.  The details are outlined in section 7.5.2 of the datasheet.

    In order to read the results from the register, here is what the 2 frame sequence will look like.

    Here are the suggested contents for each frame:

    Frame1
    MOSI: 0x00 10001 000000000 00000000b (Read Register command, Register address 0x00h
    MISO: Previous conversion result

    Frame2
    MOSI: 0x00000000 00000000 00000000b (No operation command, can be used to read conversion result in next frame)
    MISO: 0x0000 1000 0000 0000 0000 0000b (First 8 bits are contents of Register 0, followed by 0's)

    The ADC always outputs the most recent conversion result, unless the previous frame issued a Read Register command.  There is no register to read the result from, it is simply stored in the Output Data Register (ODR) that is part of the SPI port.

    Sorry, but we do not have any example code.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    Thanks a lot for your detailed explanations. I almost got there.

    Based on 7.5.1, only some part of MISO frame 2 contains the content of the selected register.

    I followed your 2 frames suggestion, for frame 2, I got

    MISO: 0x1000 1000 0000 0000 0000 0000   

    Not sure why bit 23 is 1. And based on 7.5.1, the register 0 value should be 00 1000 00, not 0x08. ??

    Based on your explanation, if I just want to retrieve ADC result, transmitting one frame will do:

    Frame1
    MOSI: 0b0000 0000 0000 0000 0000 0000b 
    MISO: Previous ADC conversion result 

    Am I right?

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    Yes, you are correct.  Assuming MOSI was held low in the previous frame, then the current frame will provide the conversion result.

    The value read in register 0x00h can change from device to device, which is why we do not list it in the available registers in the datasheet.  

    Keep in mind that the datasheet assumes the frame width is 22b.  If your frame size is 24b, the first bit clocked out (MSB) of the device is still considered D21, even though in your 24 bit frame it is technically D23.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    So the read register value is stored in the first 8 bits of the 3-byte frame.

    And ADC result is kept in the first 20 bits of that 3-byte frame, although data word is 22 bits, the last 2 is for parity check.

  • 0 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    Yes, that is correct.  The ADC result will always be the first 20 bits clocked out of the device, followed by 2 bits for parity check.  The remaining 2 bits (when clocking a total of 24 bits) will be zero.

    Same for the register value.  The first 8 bits will be the register value, followed by 16 zeros when clocking a total of 24 bits per frame.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    HI Keith,

    Now I have a problem regarding to the ADC reading. Please look at the simple circuit below: there is one very good voltage source and two resistors:

    (1) If I use 8900 Eva board to directly measure a voltage between A and C, the reading is very accurate.

    (2) If I measure voltage between A and B, the reading error can be a few tens mV.

    I wonder what factors cause the reading error and what I can do to reduce the errors.

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    The input to the ADS8900BEVM-PDK is not high impedance.  Each input is a 1kohm resistor that sets the overall differential gain of the amplifier stage, nominal Gain=1.  Adding an external source resistance will change this gain resulting in quite a bit of error.

    If you want to measure the voltage on a resistor network, you will need to add additional buffer amplifiers to provide a high input impedance.  The following application note shows an example of adding buffers on the inputs of the THS4551 differential amplifier.

    https://www.ti.com/lit/an/sbaa243/sbaa243.pdf

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    3 more questions here:

    (1) For the Eva app "ADS8900B EVM.exe", what is the format for the exported bin file?

    (2) If I click "capture or log", the existing file is appended or overwritten? It seems overwritten, isn't it?

    (3) Based on data sheet part 7.4, the chip goes to CNV state on CONVST pin rising edge, and after end of conversion it goes to ACQ state.

    It means if I want to use my MCU to continuously do conversion and get result, my MCU needs to do the following steps:

    1. Pull CONVST high
    2. wait long enough (Tconv_max) or RVS low-to-high transition
    3. SPI read
    4. Go to step 1

    My question here is, during SPI read, if I want to save time, is it safe to pull CONVST high? Will it spoil the last reading?

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    (1) For the Eva app "ADS8900B EVM.exe", what is the format for the exported bin file?

     The output data is 32 bit signed integer represented in little Endian format. Windows standard format.  You will need a tool such as MATLAB to open and plot the data.

    You can also export data directly to EXCEL (if installed on your PC) or to the clipboard.  You can do this by 'right clicking' on the plotted data in the 'Time Domain Display' and choosing 'Export to.....'

    (2) If I click "capture or log", the existing file is appended or overwritten? It seems overwritten, isn't it?

    Yes, the file will be overwritten if you save to the same directory and file name.  If you want to keep multiple files, then you need to use a different folder and/or different file name.

    (3) Based on data sheet part 7.4, the chip goes to CNV state on CONVST pin rising edge, and after end of conversion it goes to ACQ state.

    My question here is, during SPI read, if I want to save time, is it safe to pull CONVST high? Will it spoil the last reading?

    You have two options to retrieve data, referred to as Zone 1 (Figure 47) or Zone 2 (Figure 48).  It is best not to pull CONVST high in the middle of data transfer.  Zone 1 is preferred at lower data rates or when lowest response time is needed.  Zone 2 provides more time to transfer the conversion result, which requires a much lower SCLK frequency.  Please follow the timing recommendations for either Zone 1 or Zone 2, and you will not have any data corruption issues.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    Is it possible to do multiple ADC scan, let's say 10, then I use SPI to read 30 bytes at one go to retrieve 10 readings?

    It seems impossible, is it? In Figure 45, there is only one Output Data Register (ODR) buffer. If I don't read it, it gets overwritten by next ADC scan. 

  • +1 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello,

    It is not possible.  ADS8900B does not have an internal memory buffer, or FIFO.  For each conversion result, you must retrieve the data.  If you do not retrieve the current conversion result, then the data will be overwritten by the next conversion result.

    Regards,
    Keith

  • 0 in reply to Keith Nicholas
    Prodigy 196 points

    Hi Keith,

    Sorry to trouble you again. 

    In the above picture, line D3 is CONVST signal, D4 is RVS.

    What I do is: MCU pulls CONVST high to start ADC conversion and I monitored CONVST and RVS signals.

    1. When CONVST is pulled high, RVS itself goes low. MCU does not need to do anything. Yes?
    2. When conversion finishes, RVS goes high, which (RVS rising edge) can be used by MCU to start SPI read to retrieve latest ADC result. Yes?
    3. According to data sheet pg 9, ADC conversion takes 600~670 ns. How come in the above picture, the gap between RSV low to high is about 2us.
    4. To do ASYNCHRONOUS reset, RST must be held low for min 100ns. There is no mentioning of max time, I guess any length should be OK?
  • 0 in reply to he dajiang
    TI__Mastermind 36240 points

    Hello He,

    1. When CONVST is pulled high, RVS itself goes low. MCU does not need to do anything. Yes?  Yes, that is correct.
    2. When conversion finishes, RVS goes high, which (RVS rising edge) can be used by MCU to start SPI read to retrieve latest ADC result. Yes? Yes, when RVS transitions low to high, the conversion process is complete and the conversion result can be read from the device.
    3. According to data sheet pg 9, ADC conversion takes 600~670 ns. How come in the above picture, the gap between RSV low to high is about 2us.  The maximum conversion time for ADS8900B is 670ns.  There may be a small additional delay for RVS to go high, but it should never read 2usec.  Is it possible you have a measurement error with your logic analyzer?  Can you try measuring directly in the Analog view (oscilloscope) mode?
    4. To do ASYNCHRONOUS reset, RST must be held low for min 100ns. There is no mentioning of max time, I guess any length should be OK?  Yes, RST can be held low indefinitely.

    Regards,
    Keith