Using the ADCxxQJ1600EVM Software GUI, I extracted the Python SPI configuration, which showed the device commanding and ordering. Following the configuration from the software, I established a JESD204b link; however, the SYNC pin appears to be toggling.
Details:
Mode: JMODE0
Sampling Frequency: 1GHz
FPGA: Xilinx KU060
Xilinx IP: JESD204 PHY, JESD204 RX (https://www.xilinx.com/support/documentation/ip_documentation/jesd204/v7_2/pg066-jesd204.pdf)