When is the hold timing for analog data?
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Hello Yamada-san,
The ADS8924B holds the analog input voltage at a fixed level during the conversion period. The conversion period starts on the rising edge of the CONVST input, which is controlled by the host MCU.
Regards,
Keith Nicholas
Precision ADC Applications
Hello Nicholas-san,
Thank you for your prompt response.
By reading the answers I received, I was able to understand.
I'm always grateful for your help.
Regards,
Tomohiro Yamada