VSP5324-Q1: vsp5324-1 collected data is not linear

Amelie Zheng

Part Number: VSP5324-Q1
Other Parts Discussed in Thread: VSP5324

Hi Team,

Customer use vsp5324trgcrq1 on PCBA. They configure this vsp5324-1 as ramp output and find that the collected data is not linear. Then customer change an vsp5324-2 and the test is OK.

The linear issue could be found as this picture. This issue could reappear again and again.

When change again to vsp5324-1, it still can't not linear. In vsp5324-1's 4 channels, only channel 1 and 2 have linear problem, others are ok.

And vsp5324-1 and vsp5324-2 are from the same batch, bought from arrow.

over 3 years ago

0 Praveen Aroul over 3 years ago

TI__Mastermind 49906 points

Hi Amelie,

We have some questions. Can you please help to address them?

1. Do they use the bit clock (LCLK) provided by the device or use the system clock to read out the bit data.

Would it be possible to share the eye diagram of both data and the bit clock?

2. Can you please share the raw data of the ramp presented in the previous post?

3. Do they notice the issue on a particular bit in the data pattern or is the error randomly distributed across different bits?

0 Amelie Zheng over 3 years ago in reply to Praveen Aroul

TI__Genius 10865 points

Hi Praveen,

The following is the first channel of the ADC set to harmonic output, and the output of the partial bit is measured twice. orange and blue are the twice measure result.

0 Praveen Aroul over 3 years ago in reply to Amelie Zheng

TI__Mastermind 49906 points

Hi Amelie,

Thanks for sharing the data. Can you please check for the other questions as well?

0 Praveen Aroul over 3 years ago in reply to Praveen Aroul

TI__Mastermind 49906 points

Hi Amelie,

Since I did not hear back from you, I believe customer was able to resolve the issue.

I will close the post and if you have any pending questions, feel free to post them here.

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VSP5324-Q1: vsp5324-1 collected data is not linear