Hello Everyone
What is the maximum SPI Clock of ads1291 when using internal clock 512Khz ?
thank you
Regards
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Hello Everyone
What is the maximum SPI Clock of ads1291 when using internal clock 512Khz ?
thank you
Regards
HI,
Do you have a ADS1291 Evaluation kit/board(EVM)?
According to data sheet,
If f_clk is 512 kHz, i.e. 1953.125 ns period, you will need to set CLK_DIV bit of LOFF_STAT register = 0.
and SCLK can only be twice the speed of f_clk during register reads and writes,
so, if f_clk is 512 kHz or 2.048MHz, f_sclk can not be higher than 1024 kHz or 4.096MHz, respectively -
Thanks
Hi,
This ticket/thread has been pending for more than 1 week.
For house cleaning, I am closing this ticket/thread. If you may have other question, feel free to open another ticket/thread.
Thanks