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ADC128S102: What is the maximum number of devices (ADC128S102CIMT and DAC121S101CIMK) that can be directly connected to one SPI Master?

Tim M
Prodigy 10 points
Part Number: ADC128S102

Hi E2E, 

I am wondering about the max number of devices on the bus that are directly connected to one SPI master for the following TI devices: ADC128S102CIMT and DAC121S101CIMK. As well as the max Frequency on the SPI Bus, line SCLK. The recommended Freq. for the ADC is 8 to 16 MHz, but the recommended Freq. for the DAC is 30MHz. Being that I want to to have as many devices connected to the SPI bus, the operating Freq and number of devices are both of interest.

Thank you, 

T.M. 

  • 0
    TI__Mastermind 25020 points

    Hello T.M.

    The max number on a bus is really based on your host capabilities (i.e. FPGA, Microprocessor). This is not a limitation that is imposed by the ADC nor DAC.

    On an SPI bus, devices are commonly communicated with individually, thus you may communicate with the ADC at the clock rate it supports, and then communicate with the DAC with the respective clock frequency for it. These frequencies do not need to be the same.

    The only case where this would happen is if the ADC and DAC share the same Chip Select signal and the host will communicate with both devices simultaneously, the device will share the same SCLK but different SDI/SDO. If this is not your case, then use the frequency needed for each devices in an independent manner.

    Regards

    Cynthia