Other Parts Discussed in Thread: DDC264
is it possible to reduce a given photodiode current at the DDC316 input in order to aviod a saturated signal?
(The integratoin time is already at 11µs and the capacitor setting is 12pC)
We´ve already tried serveral voltage/current divider configurations but this does not seem to work correctly and leads to significant offset shift effects (especially with longer integration times).
Thanks in advance.