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DAC38J82: AC coupling capacitor placement for JESD interface

Part Number: DAC38J82
Other Parts Discussed in Thread: DAC38J84

Hi,

I am using DAC38J82 DAC IC.

For JESD interface,it is mentioned in your training material "TEXAS INSTRUMENTS JESD204B series The Physical Layer PHY" that the ac coupling capacitors has to be placed at the transmitter side.

But in the DAC EVM-DAC38J84EVM, it is placed near receiver side.

Where should the ac coupling capacitors be placed if it is a longer trace length greater than 4 inches?

  • Hi Sarojini,

    Generally, it is recommended to place these capacitors near the transmitter side to minimize the amount of reflection that will accumulate over the transmission line, however placing at the receiver side will also work (as shown on our EVM) if the capacitor impedance is much lower than the line impedance at the frequency of interest. The line impedance is 50Ω. The AC caps on the EVM are Murata GRM033R61A104KE15D, which if you look at the impedance over frequency characteristic for this capacitor, you will find that up to 8GHz or so the impedance is 5Ω or less. We can assume the impedance beyond 10GHz will be in the teens of ohms, not as ideal as 8GHz and below, but still suitable.

    You want to avoid placing the capacitors near the middle of the total lane distance (which would be the case if our capacitors were nearest to the FMC connector on the EVM) as doing so allows for standing waves and reflections on both side. I would suggest to place these nearest to your FPGA. Use low impedance 0201 capacitors that cover the serdes range you plan to operate the DAC38J84 in to minimize the impact that the placement will have on your signal integrity.

    Regards, Chase