ADC3683: ADC3683 deserializer source code to interface with Xilinx FPGA

emil asriyan

Prodigy 10 points

Part Number: ADC3683

Hello,

Our design team is evaluating ADC3683 using DC134 eval board for our future product line.

I was looking for an 18-bit ADC deserializer source code to interface with Xilinx Ultrascale+

I am a bit confused about the need for an additional DCLKIN.

Previously we’ve used ADC with only a sampling clock (Fs) going to an ADC.

Thanks,

Emil.

over 1 year ago

0 Amy over 1 year ago

TI__Genius 9021 points

Hi Emil,

I am checking to see if we have source code to provide you. You are correct, the ADC3683 requires both a sample clock and data clock. This can either be provided 1) externally, with 2 clocking sources or 2) internally, using the CDCE6214WRGERQ1 onboard clocking chip (generates both the sample and data clocks).

Regards, Amy

0 Amy over 1 year ago in reply to Amy

TI__Genius 9021 points

Hi Emil,

We do not currently offer source code on our end - I recommend checking with Xilinx support on this.

Regards, Amy

0 emil asriyan over 1 year ago in reply to Amy

Prodigy 10 points

Hi Amy,

Thanks for checking.

regards,

Emil

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ADC3683: ADC3683 deserializer source code to interface with Xilinx FPGA