• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 47 subscribers
  • Views 389 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS5407: Design Help

SVJS
Prodigy 140 points

Part Number: ADS5407

I am integrating this ADC with FPGA. Regarding that I have some doubts. 

Doubt 1: DACLKP/N & DBCLKP/N : Is it required to use 100ohm termination resistor in FPGA Side when mapping this signal to FPGA (MRCC Pin)?

Doubt 2: Sync_OUTP/N (1/2) : These signal can we map directly to FPGA pins?

Doubt 3: Enable : Pull down resistor is necessary for this Enable or directly we can map to FPGA ?

  • +1
    TI__Mastermind 24550 points

    Hello, SVJS,

    1. Yes, the LVDS pair needs a termination with the 100ohm resistor inside the FPGA. This should be regardless of pin type, MRCC or SRCC.
    2. The SYNC OUTP/N can be connected directly since there is an internal 100ohm termination in the ADC. No termination at the FPGA is necessary.
    3. The chip enable is internally pulled high (ADC is active high therefore, enabled by default). You will not want to add a pulldown resistor. You can connect this directly to the FPGA. 

    Regards, Chase