Hi
I am working on the ADS1258 and wanted to know if there is way to reduce the sampling rate below the stated limits based on DRATE bits.for eg can we go lower than 1831 S/S when the DRATE bits are 00.
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Hi
I am working on the ADS1258 and wanted to know if there is way to reduce the sampling rate below the stated limits based on DRATE bits.for eg can we go lower than 1831 S/S when the DRATE bits are 00.
Hi Chintan,
There are two options here. First off, the ADS1258 includes a delay register (DLY) which allows you to add in switch time delay. This comes in handy when you are using multiple channels and need to include additional delay time as the mux cycles. Using this delay register, you can decrease your data rate beyond 1831 SPS. Take a look at Table 7 on page 21 of the data sheet for more information. You can also use the CHOP feature to help eliminate offset error while decreasing the listed data rate by two. This is also explained in the data sheet and may be something to look into.
Secondly, If you choose to use an external fclk, you can decrease the master clock frequency and the data rate will scale with it. This could effectively give you the data rate that you desire. Just make sure that you do not violate any timing specs in the data sheet.
Regards,
Tony Calabria
Hi Tony
Thanks for your reply.Is there a characterized table for external fclk i.e Some reference where it shows by how much the data rate goes down by changing the frequency.I want to use it for a 400S/sec for a 8 channel count
Thanks
chintan
Hi Chintan,
The data rate is going to scale linearly with fclk, meaning that depending on you DRATE and DLY settings, the fclk can be decreased to fit the desired final data rate. It is a rather simple calculations so we do not have any kind of characterized table but I can put together something quick in excel to help you understand if that would help.
One thing to note that I do not think you are accounting for is that the ADS1258 is a single delta sigma ADC with an internal cycling mux. Therefore, the data rate numbers that are in the data sheet are for one channel. If you want to read back all 8 channels in 400SPS (for example), you are going to need to set the ADC to a faster data rate. To read back 8 channels in 2.5ms (1/400SPS), you are going to need to run the converter at 3200SPS or faster. This would be the only way that you can convert and read back 8 conversion results within 2.5ms.
Regards,
Tony Calabria
Hi Tony
It will be great if we can get some sort of excel with the data. I understood from the data sheet that in case of 8 channels it would go down to 50S/sec and that what we are looking at i.e a total of 400S/s
Thanks
Chintan Parekh
Hi Chintan,
I put this together real quick. It should give you something to start with. I tried to plug in some example numbers to get you close to 400SPS data rate since that is what your targeting.
Regards,
Tony Calabria