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ADS1278-EP: SPI Data output is Not Consistency for all 8 channels.

Part Number: ADS1278-EP
Other Parts Discussed in Thread: TMS570LS3137, ADS1278, THS4524

Hello Team, 

I am trying to connect the ADS1278 with TMS570LS3137 MibSPI, I am seeing some inconsistence output from SPI Output.

My setup is i am driving the ADC with 2V input with THS4524 and measured voltage level at ADC pins Input differential level is 2V and its stable too.

For all 8 channels are in 2V input. I am trying to read the data from SPI and I am seeing below behavior,

From channel-01 I am getting stable output (2V) when I read from Debugger Mode, but for 10 readings once I can see some deviations like 1.5V or 0.8V. but Analog input is still stable at 2V.

For Channels-03 to 04 I am getting deviations in outputs for 3 or 4 readings. But other channels-05 to 08 not getting the consistency output from SPI Data and lot of deviations like its showing negative values sometime since my input is at 2V.

Please let me know can I get some assist to resolve this issue?

Thanks, 

Venugopal 

  • Hello Venugopal,

    Can you provide a schematic of the ADS1278 so that I can see how you have it connected and configured?

    Also, is the TMS570 and ADS1278 on the same PCB near each other, or on different PCBs?

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • Hello Keith Nicholas, 

    Both TMS570 and ADS1278 in same board and near to each other. Distance is also not more than 2 to3cm, we are using two ADCs with Two different SPI buss.

    We are seeing the same behaviour in both ADCs, Please refer below images for Schematics.

    ADC :

    Controller:

    ADC Settings as below (Done by using Hardware jumpers):

    F-CLK: 27MHz

    Format:[001] SPI-TDM-Fixed

    Mode: [01] High-Resolution

    ClKDIV:[1] high

    TEST: [00] Normal Converter Operation

    I hope this details will help you to analyse more and suggest any solution.

    Thanks,

    Venugopal

  • Hello Venugopal.

    Please confirm AVDD=5V, DVDD=1.8V, and IOVDD is between 1.8V and 3.3V typical.  Also, please confirm that F-CLK=27MHz and is continuous, and has the same voltage level as IOVDD.  In addition, in order to shift all data out during the conversion cycle, SCLK should ideally be either 13.5MHz or 27MHz.

    It is highly recommended to assert the /SYNC pin after power-up and all supply voltages have stabilized.  This ensures a proper device reset and synchronization of all internal data converters.

    Finally, please capture an entire SPI frame using a logic analyzer or oscilloscope, including /DRDY, SCLK, and DOUT1, to help with further debug.

    Thanks!

    Regards,
    Keith

  • Dear Keith, 

    We got resolved the issue, Cause of issue is previously Sync is always in toggle.

    Currently we have changed to Reset the sync on every Single Acquisition. 

    Now we are getting the ADC Data output Consistency without single data Loss.

    And small change also we did: Mode we changed to Low Power Mode, I will update to you once checking High-Resolution also.

    Thanks for your support.

    Venugopal B