Other Parts Discussed in Thread: ADC12DJ3200, ,
#1
I like to confirm a few things below for running ADC12DJ5200 at 12.5Gbps line rate (Fbit = 12.5Gbps).
Which means
1. Fclk (sampling clock) is 3125MHz in JMODE0/2 and 5000MHz in JMODE11/22 and JMODE5/7
2. Fsysref can be 3.90625MHz at F = 8, K = 4 and n = 10 in JMODE0/2
3. Fsysref can be also 3.90625 at F = 2, K = 16 and n = 10 in JMODE11/22
Were they right?
#2
in Table 7-24, it says that K = 16 Min with Step 8. While K is 20 in JMODE11 configuration file from ADC12DJxx00 GUI.
Which one is right K parameter, 16 or 20? 16 + 8 is not equal to 20.
#3
Where can I find the configuration files for ADC12DJ5200 for JMODE 19 and greater, for example, JMODE 22.
slac745a has only JMODE0 to 18. Thank you.
