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ADC121S051: CS/ kept low behavior

Jonathan Navor
Genius 9475 points
Part Number: ADC121S051


Hi team,

Good day! We have a question for ADC121S051. We have seen the datasheet and that the ADC121S051 needs the CS/ falling edge to carry out the conversion and that CS/ may stay low for long period before a new conversion.


But what happens in that case (CS/ kept low ) for instance on the SDATA pin? It does make any difference on the SDATA output pin if the CS/ stays low or high after the conversion? 

What happens if the CS/ pin is kept low for an undefined period of time (let's say 10s)?
Thank you in advance for the support. 
Best regards,
Jonathan

 

 

  • +1
    TI__Mastermind 22950 points

    Hi Jonathan, 

    With CS held high, I don't see a problem as the device will not start conversions or acquiring the input signal. However, when CS is held low for an extended period of time, the thing to look out for is the sample rate you will be achieving. There is a minimum sample rate of 200kSPS. So please be mindful of that and if you are not violating that spec, then there should be no issue. If you do violate that spec, I can't say for certain what will happen as it is often hard to predict device behavior but experiencing unexpected device behavior would not be out of the ordinary. 

    Regards,

    Aaron Estrada