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ADS5294: LCLK and ACLK phase alignment problem

Part Number: ADS5294

Hi,

I have experienced problems setting up bit D5 and D6 reg 0x42. It seems that the alignment is aways <1:0> regardless of the bits  i want to set -<0:0), (1:1) etc.

The problem is that bit 15 reg 0x42 must be set so that D5:D6 take effect.

The data sheet has it wrong stating that bit 15 must not be set. Please fix that

Thanks,

Lt