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ADC12DJ5200RF: data mapping on link layer

new2day
Expert 1950 points
Part Number: ADC12DJ5200RF

Hi,

I'm a bit confused about the sample or data mapping on the JESD204B link layer.

The link layer is always 256bit width. 

I like to check how was the data mapped at link layer output in JMODE0/2 and JMODE11/22 (most wanted). Thank you.

Regards,

Ying

  • 0
    TI__Guru* 91947 points

    Ying,

    We are looking into this.

    Regards,

    Jim

  • 0
    TI__Mastermind 20541 points

    Hi Ying,

    Table 7-27,7-29,7-36 and table 7-45 show you the data packing for JMODE0,2,11 and 22.

    Regards,

    Neeraj

  • 0 in reply to Neeraj Gill
    Expert 1950 points

    Hi Neeraj,

    My question is how were the data on Table 7-36 and Table 7-45 mapped onto JESD204B link layer. It's a 256bit bus. Thank you.

  • 0
    Expert 1950 points

    Hi Jim,

    Any updates? Hope to hear from you ASAP. Thank you.

  • 0 in reply to jim s
    Expert 1950 points

    Hi Jim,

    Any updates? Thank you.

  • 0 in reply to new2day
    TI__Intellectual 2370 points

    Hi Ying,

    The Xilinx JESD IP does the following:

    1> It concatenates the data of all the lanes to generate one output bus. For an 8 lane link, you will see a 256 bit bus (32 bits per lane per clock cycle)

    2> On each bus, the order of the bytes is reversed (to ensure that the first received byte is mapped to byte 0, the second to byte 1 and so on).

    To map the JESD IP output to the data you see in the JMODE table, kindly do the following:

    1> Separate the 256 bit bus into 8 32 bit segments. The lowest segment (31:0) will be for Lane 0, the highest (255:224) will be for Lane 7

    2> For each lane, byte reverse the data. You should now see the data map exactly as displayed in the JMODE table. Please note that in cases like JMODE0, where F=8, you need to accumulate two cycles of data on each lane (to create the 64 bit frame) in order to check the mapping of the data to the JMODE table. The 64 bit frame is also needed in order to identify the correct 4 tail bits that need to be discarded in each frame.

    I hope this addresses your query.


    Regards,

    Ameet