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ADC3662: Digital Output

ArTzy
Genius 17375 points
Part Number: ADC3662

Hi Experts,

Good day. Seeking your advise on this query from Cx:

"ADC3662 digital output is not correct. Even when a test pattern of all ones is loaded up, DA0 and DB0 are low for the first bit after the frame clock transition. A constant test pattern is used to test the digital interface. I should see all ones. I don't."

Already advise him to follow the EVM's reference and user's guide but no avail. They are using the EVM already.

For your further support.

Regards,
Archie A.

  • 0
    TI__Genius 15321 points

    Hi Archie,

    Can you please share captures of the issue? What clocking source is being used? Are you able to capture a noise floor?

    If using the ADC35XX GUI, one thing to check is setting the 'custom pattern' box to a '1'. Press the 'enter' key and check the register write log to ensure the register writes went through. I would recommend trying a 'ramp test pattern' and viewing in codes. 

    Regards, Amy