ADC08500: Maximum Frequency for LVDS

Bob Armbruster

Part Number: ADC08500

What is the maximum LVDS clock input for ADC08500? The datasheet does not specify maximum value, only operating frequency of 500MHz.

0 Rob Reeder over 1 year ago

Hi Bob,

The maximum clock signal level can be determined by the operation conditions table in the datasheet.

So LVDS will work, which is typically 800mVpp DIFF.

See below.

Thanks,

Rob

0 Bob Armbruster over 1 year ago in reply to Rob Reeder

What is the maximum input clk+/clk- supported frequency?

0 Rob Reeder over 1 year ago in reply to Bob Armbruster

Hi Bob,

The max sampling rate of the ADC is 500MHz. Therefore, the clock input rating is 500MHz.

Regards,

Rob

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