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ADS8568: Input range

Danilo A.
Mastermind 26900 points
Part Number: ADS8568

Hi Team,

We received this inquiry from our customer.

In the datasheet for the ADS8568 it is stated that the minimum voltage levels with which the device will function for HVDD and HVSS are +5V and -5V respectively.

However, looking through the datasheet all input characteristics are specified with the HVDD at +15V. In addition the maximum input voltage is +10V (taking only the positive side).

When the HVDD is reduced to +5V (i.e. the minimum allowable), what is the maximum range of the input voltage for the converter to function correctly? In our case it seems to limit/clamp at around 4 - 4.1V. Is this correct? The part is configured for parallel bus, STARTCONV control and 2x VREF input, with VREF being externally generated at 2.5V value.

I understand that the analog input voltage range are ±4 VREF or ±2 VREF depending on the setting of the RANGE pin. 

The ADC is set up for +/-2x VREF operation.
We use an external reference in this application. It is based on a REF5025AIDGK, but it is HEAVILY buffered and stabilised, because of the tendency of the ADC to draw current spikes. on the VREF input. With an external voltage input, we managed to get a flicker of typically +/-1bit (value) out of 65536 with the design.

I shall attach diagram sections of the ADC itself, the regulator supplying it and the amplifier channel that drives the ADC input. What is important here, and that was the reason I asked the question w.r.t. the performance of the ADC in these conditions, is that the HVDD of the ADC and the opamp are both supplied from the same regulator set at 5V. So my question is: what happens to the ADC function if the input voltage rises to 4.5V, when the HVDD is only 5V? Will the ADC not in some way malfunction then?

I wanted to add that the ADC itself and the amplifier reside on different boards, but the only intervening devices are gold-plated square-post connectors. The socket is in fact a Samtec brand bottom-entry device.

 

Regards,

Danilo

  • 0
    TI__Mastermind 24940 points

    Hello Danilo,

    The device specifications were created to cover the most common scenarios, in this case, that is HVDD/HVSS to +/-15V.

    The Absolute Maximum rating indicates the analog input voltage is limited to within HDSS/HVSS, by +/-0.3V. Note this is an Abs Max and not operating condition. the Abs Max limit function of the device. The operating conditions should be met for continued use. 

    It is recommended to have significant headroom between the analog input and the HVSS/HVDD, about 3V. The closer the analog input is to this level, there can be degradation of performance. 

    If the recommended conditions are met, the customer should expect similar performance as stated on the datasheet. 

    Regards

    Cynthia

  • 0 in reply to Cynthia
    TI__Mastermind 26900 points

    Hi Cynthia,

    Thank you for your response. Please see the comment of our customer.

    One aspect I would like to point out:
    The minimum required headroom (in this case the below-mentioned 3V) between the input voltage to the ADC and its HVDD/HVSS should be listed in the datasheet, whereas in this case it is not.

    I need to point out one aspect:
    In the datasheet for the ADS8568 the minimum HVDD supply voltage is set at +5V, while no other information is given with regard to minimum headroom, as mentioned in your response.
    Snippet of the recommended operations conditions attached.

    Regards,

    Danilo

  • 0 in reply to Danilo A.
    TI__Mastermind 24940 points

    Danilo,

    The 3V headroom is a recommendation, and has not been extensively tested on the bench, this is a conservative measure. But it is a great recommendation to include this detail in the datasheet, we will note this. 

    Let me reach out to my team to find anymore insight on this. 

    Regards

    Cynthia

  • 0 in reply to Danilo A.
    TI__Mastermind 24940 points

    Danilo, 

    Looking deeper into it, there is a minimum headroom of 1.5V for HVDD and HVSS for performance.  Hope this clarifies any questions

    Regards

    Cynthia