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Power of DAC1220 / 20 bit at lower main clock rates

d sandquist
Prodigy 160 points
Other Parts Discussed in Thread: DAC1220

Looking at the data sheet for the DAC1220, there is a power level given for 0-5V / 20 bit mode as 3 mW.  However, the table says the main clock rate is 2.5 MHz. 

1.  What is the power if the main clock is 1 MHz or the lower limit of 500 kHz?

2.  Also does this 3 mW include 250 kS/s update rate on the device or at a quiescent DC value (no serial interface clocking / updating DAC)?

3.  Finally, is the power lower when it is at 25°C rather than from Tmin to Tmax?  (If so, how much.)  This is for lab environment with hard power metrics so I need to squeak as little power as possible.

Any help would be appreciated.

thanks,

David

  • 0
    TI__Guru** 113765 points

    David,

    The DAC1220 was designed about 14 years ago when power consumption wasn't as big of an issue is it is today.  So we really don't have detailed data on the DAC1220 that you would like to see.  There is no data for any clock speeds less than 2.5MHz, but I would suspect it to be slightly less. 

    The power spec in the datasheet is over all rated temperatures, and 16 bit mode uses less power than 20 bit mode.  The power dissipation shown is at full operation unless it is in SLEEP (0.45mW).  So in 20 bit mode you should see very close to the typical.  Any other data you will have to collect on your own.  We have an order-able DAC1220EVM that has the ability to measure current supplied to the DAC1220.  From this you could derive the power dissipation.

    http://focus.ti.com/docs/toolsw/folders/print/dac1220evm.html

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 160 points

    Thanks.  I thought it was worth asking.

    Since the DAC1220 is an older design, I'm wondering if there is a newer (or older) design that is a better fit.  That would mean smaller, lower power, and/ or lower DC - 10 Hz noise.  I've checked the site many times, but I may have missed something.

    Here are my constraints:

    1. DC - 10 Hz noise at or less than 1 micro-volt rms
    2. 16 to 24 bit (actually noise is more important than resolution in this case).  I can't go lower than 16 bits.
    3. Update rate greater than 10 x / sec.  Settling time (<10 mV jumps) less than 10 msec
    4. Typical step sizes will be less than 100 mV... more likely right down near the last few LSB's
    5. Small size & low power are important metrics (We won't move from the DAC1220 if either of these go up)
    6. There will be no sleeping
    7. Voltage supply ideally unipolar 3V - 3.6V, but not required
    8. Digital lines accept 3.3V (not required, but desired)
    9. Can handle just about any serial / digital interface (SPI, I2C, etc)

    I think that is it, but let me know if you have any questions and any suggestions.

  • 0 in reply to d sandquist
    TI__Guru** 113765 points

    David,

    Always feel free to ask, as often times we can give more information.  At this time the best solution we have is the DAC1220.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Prodigy 160 points

    Thanks for the quick responses.  This answers my questions.