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AFE58JD18: AFE58JD18 power consumption problem

jeno.zhang
Expert 2855 points
Part Number: AFE58JD18

Hi TI，

JESD interface problem: For the same amount of data, which one can save more power by increasing the number of LANEs and the line rate?

  • 0
    TI__Expert 6980 points

    Hi, 

    Typically, power will increase with the increase in the sampling speed and hence the Lane Rate.

    Higher the lane rate, higher the power consumption.

     

    For a fixed, sampling speed, across JESD PLL Modes, the major contributor to power consumption will be DVDD1P2 (1.2 V) Supply.

    For example: Say Fs - 40 MHz, 12 Bit mode:

    AVDD_1P8 Current - 137 mA

    DVDD_1P8 Current - 25 mA

    DVDD_1P2 Current - 245 mA (2ADC/lane mode - 40x Mode)

                                     - 190 mA (4ADC/lane mode - 80x Mode)

                                     - 170 mA (8ADC/lane mode - 160x Mode)

    Hence, power consumption is more when you have more active JESD lanes. Hence, using less number of lanes will definitely save power. However, the lane rate will be high.

    You can further refer to the datasheet power consumption plots provided on Page 35 and Page 36.

    Thanks & regards,

    Abhishek