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ADC12DJ4000RFEVM: bringup / connection with TSW EVM issue

Part Number: ADC12DJ4000RFEVM
Other Parts Discussed in Thread: ADC12DJ5200RF

Thanks for replying to previous thread,

(https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1160357/adc12dj4000rfevm-bringup-issue?ReplyFilter=Answers&ReplySortBy=Answers&ReplySortOrder=Descending)

It seems the FPGA EVM and ADC EVM are still not communicating.

In our case D4 is NOT flashing and D3 is NOT on. but i am sure what could be the cause and how to proceed

please advise.

thanks

Gaurav

  • Hi Gaurav,

    Can you please make sure the the Jumper J13 labeled REFSEL is installed?

    Current limit for ADC and TSW boards is set to 3 amps and 5 amps?

    The clock signal generator and ref clock signal generator are locked with 10M ref with each other?

    Also when you click the update temperature does it update the temperature? if it does it will tell us there is communication between ADC board and GUI. 

    Regards,

    Neeraj

  • Hi Neeraj, please my answers below:

    Can you please make sure the the Jumper J13 labeled REFSEL is installed?

    >> YES, it is correctly installed.

    Current limit for ADC and TSW boards is set to 3 amps and 5 amps?

    >> YES both power supplies are set at 12V, are drawin about 2amps

    The clock signal generator and ref clock signal generator are locked with 10M ref with each other?

    >> YES, both clocks are coming from the same JBERT . Ref CLK=130MHz(J12) and Sampling CLK=1300MHz (J10)

    Also when you click the update temperature does it update the temperature? if it does it will tell us there is communication between ADC board and GUI. 

    >> YES, the temprature changes, so there is a link between ADC EVM and the GUI. I have made sure that the FMC is properly connected.

    Additionally: D3 LED on TSW EVM is yellow but NOT blinking. D4 LED is Off. When I press the 'Program clocks and ADC' button on the ADC GUI, the D1:D5 LEDs on TSW EVM go OFF for a moment before reverting to final state.

    Under the JESD tab of the ADC EVM, the Serdes PLL locked button is green but SYNC status and Link up status button is black,

    thanks

    Gaurav

  • Hi Gaurav,

    Can you please confirm you have selected the 

    ADC12DJxx00RF_JMODE0 ini file and firmware file that get uploaded is TSW14J57RevE_16L_XCVR_ADCDDRDACBRAM? 

    Regards,

    Neeraj

  • Yes Neeraj, I confirm, that is the correct file 'ADC12DJxx00RF_JDMODE0

    thanks

    Gaurav

  • D1,D2,D3 LEDs should be off and D4 LED labeled RX_CLK on TSW14J57 should be blinking. if it is not blinking means the reference clock is not going to the FPGA or firmware is not getting loaded properly to the FPGA. Again can you please check both clock signal on the Oscope and make sure they look ok. 

    Regards,

    Neeraj 

  • Yes, i have checekd the clock signals on the scope mutiple times, but i'll plug out all connrectors and do it again and update.

    D4 never blinks, I am also suspicious something on the 'clock' side hampering propoer communication between the 2 EVMs. i'll revert back. thanks

  • Hi Neeraj, I checked the clocks on the scope again, they are fine. RefClk=130MHz, SamplingCLK=1300MHz, Data=2000MHz. I also tried RefClk=260MHz, SamplingCLK=1300MHz just in case.

    Now one thing that I want to confimr is that we are in external reference clokc mode, and the manual says that it is the default mode, so i assume that we don't have to make any change to the board.

    I want to confirm this as the manual also says to :

    • Remove C2 and C3, populate R171 and R174
    • Remove C60 and C61, populate C52 and C306

    But i assume that the board is already in this configuration. Please confirm that we don;t have to modify the board.

    thanks

    Gaurav

  • Hi Gaurav,

    Sorry for the confusion, the ADC12DJ4000EVM is the same as the ADC12DJ5200RF EVM. The components you noted above can be verified by simply looking thru the BOM of the design files which are located here.

    https://www.ti.com/tool/ADC12DJ5200RFEVM

    We will address the design files to have those posted under the ADC12DJ4000EVM webpage for easier reference.

    Regards,

    Rob

  • Hi Gaurav,

    Please note external clock is the default option not External reference clocking option. The EVM is by default setup to use external clock option.

    Here is the cutt out from the users guide. 

    Regards,

    Neeraj