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ADS5292: LVDS received data delay varies between channels

Liu Yang
Expert 8745 points
Part Number: ADS5292

Hi Team,

I am trying to input the same analog signal to all channels of the ADS5292 and receive AD conversion results as LVDS data
, but only channel 4 and channel 5 have a difference of about 2 samples from other channel.

No decimation filter is used at fs=40MHz. Is there any possible cause on the ads5292 side?

Best Regards,

Tom Liu

  • 0
    TI__Mastermind 19815 points

    Hi,

    Due to simultaneously supporting high volume of customers, the App Engineer Expert for this device shall get back to you in another 24 hours.
    Thanks

  • 0
    TI__Expert 4890 points

    Hi Tom, 

    This is not an expected behavior from ADS5292. To understand your problem better, can you answer the below questions - 

    1. How many devices have you seen this issue in? 

    2. Is the difference in latency? That is, is there a delay in received samples between the good channel and the bad channel? If yes, is it two sample delay or 50us (2 sample delay at Fs = 40MHz). 

    3. Between, the good channel and bad channel, is the difference in output code? If yes, what is the difference in output codes? 

    4. Can you share the output waveform data across all 8 channels? 

    Thanks,

    Karthik

  • 0 in reply to Karthik Nagabhushana
    TI__Expert 8745 points

    Hi Karthik,

    1. How many devices have you seen this issue in?
    　　→　1 device Only .
    2. Is the difference in latency?
    　　→　 Yes. See Attached PDF.
    3. Between, the good channel and bad channel, is the difference in output code?
    　　→　No. Real Analog signal.
    4. Can you share the output waveform data across all 8 channels?
    　　→　 Yes. See Attached CSV.

    送付221013.zip

    Best Regards,

    Tom Liu

  • +1 in reply to Liu Yang
    TI__Expert 4890 points

    Hi Tom, 

    1. Any chance you can replace the faulty device with a good device and see if the issue goes away in the system?

    2. Are you using SYNC signal for the 40MHz case? 

    3. For the faulty device, can you read out all the registers from the register map, and share it? That will help us decide the current status of the device. 

    4. Are you in LVDS 1-wire or 2-wire mode? 

    5. Using MAP_CH1234_to_OUTn<3:0> and MAP_CH5678_to_OUTn<3:0>, can you i) Map ADC input channel IN4 to OUT3  ii) Map ADC input channel IN3 to OUT4 iii) Map ADC input channel IN5 to OUT6  ii) Map ADC input channel IN6 to OUT5. In which channels do you see the delays now? 

    Thanks,

    Karthik

  • 0 in reply to Karthik Nagabhushana
    TI__Expert 8745 points

    Hi Karthik,

    1. It is possible to try an exchange as a last resort.
    2. Are you using SYNC signal for the 40MHz case?
    → Yes . I rechecked the timings and they were fine.
    3. For the faulty device, can you read out all the registers
    →　It will be a little difficult right away.
    4. Are you in LVDS 1-wire or 2-wire mode?
    →　1-wire
    5. Using MAP_CH1234_to_OUTn<3:0>
    →　I tried swapping IN5 and IN7, and swapping IN6 and IN8.
    Channels with different delays are moved by switching.
    Also, when I output a RAMP waveform instead of an analog signal, all channels are output with the same delay.

    Best Regards,

    Tom Liu

  • +1 in reply to Liu Yang
    TI__Expert 4890 points

    Hi Tom, 

    1. Okay, we can revisit this option once we exhaust other options.

    2. Can you probe the sync with respect to clock and share a picture? 

    3. It would be good if you could read out all registers. If that is difficult, for now, can you share the registers that you are writing to the device after a reset? 

    4. Okay. 

    5. Okay. Just to confirm again, can you change Fs = 50MHz and confirm that you are still seeing 2-sample delay? 

    6. Can you read out the following register bits and ensure that they are set to 0: USE_FILTER<8:1>, HPF_EN_CH<8:1>, GLOBAL_EN_FILTER

    Thanks,

    Karthik

  • 0 in reply to Karthik Nagabhushana
    TI__Expert 8745 points

    Hi Karthik,

    I read back the filter registers.
    And I found that the registers corresponding to CH5 and CH6 were not set.
    (It was caused by our software bug.)
    Fixed the bug so all channels have the same delay .

    Best Regards,

    Tom Liu