ADS1234: Technical information on DAQ circuit

Hi Bob,

Our customer followed your advice on testing the adc and still have some doubts:
1. The first image shows the output of adc with shorted inputs. Here the customer sees an average of 0.165 millivolts of output even though both inputs are shorted, it is small but should he be expecting something very near to zero volts?

2. The customer first made a static bridge of similar resistors but the problem is that he is getting too much variance in result as indicated in figure. this is the case for all of them. Does the quality of resistors come in to play here? because when he removed one of the resistors and added a strain gauge sensor all these variances were reduced drastically.

Plus he is directly connecting bridge output to the inputs of adc should he be using low pass filters? Since he is also experincing peaks in voltage relatively small to the output of the sensor but they are there which he don't know where are they coming from.

caseAttachments.zip

Thank you and kind regards,

Gerald

Hi Gerald,

It would be helpful to see a schematic so I can fully understand how the ADS1234 is configured.  It would also be more helpful to know the raw ADC code values as opposed to the computed voltage values which eliminates any computational error.  I would also recommend that the customer review A Basic Guide to Bridge Measurements.

In practice it is good to use a low-pass antialiasing filter.  Also, noise greatly increases relative to the SPEED pin setting for ADS1234.  For the shorted input test the customer needs to make sure that the inputs are within the input range of the ADC.  This means when the PGA is used (Gain setting is 64 or 128), the short must be greater than 1.5V above AGND and also 1.5V less than AVDD.  That is the reason for the voltage divider that I mentioned in my previous post.  Also, there could be a device offset. but it should be much less than 0.165mV and more on the order of nV.  To rule out computational error this is why it is best to see the raw code values.  The ADC offset can be removed by issuing 26 SCLKs (2 or more additional SCLKs from normal data read) which will then issue an internal offset calibration.

As far as noise is concerned, it is much easier once again to use the raw codes from the ADC and determine the peak-2-peak value of codes and compare to full-scale number of codes as opposed to making a calculation in volts as there could be a calculation error.  The plots thus far assume that the conversion is done correctly.  If the plots are showing mV, then most likely the gain settings are not as I would expect.  For most Wheatstone bridges that I have seen, the maximum gain should be used.  The sensitivity of the bridge is provided in mV/V.  A sensitivity of 2mV/V means that the bridge output at full loading would provide an output of 2mV for each volt of excitation.  If a 5V excitation is used, then the maximum output of the bridge would be 10mV.  To measure this small signal effectively you would want to use a 5V excitation source for the bridge and the same 5V source to be used as the ADC reference voltage.  You would also want to use the maximum gain (128 or both gain pins set high) to get the lowest noise and best resolution.  This would allow for a full-scale range of +/- 0.5 * Vref / GAIN or 2 * 0.5 * 5 / 128 = 39mV or +/- 19.5mV.  So I suspect that there is either a computation error or the customer is using the wrong configuration for the ADC.

Best regards,

Bob B

Hi Bob,

Thank you for all the help. Here is channel1(file name ch0.csv) data raw. The customer has also added schematics. He is using a 1% tolerance resistor for the Wheatstone bridge. He has also added data with strain gauge output in another file strain gauge.csv. He has read the data sheet about the noise increment when using 80sps but this noise is still higher than what the datasheet tells. He has not recorded measurements for shorted inputs but he will send them in two days. He is always using gain 128 to measure the output of bridges. Even though with a gain of 1 he was able to get the values from brigdes during strain measurements. To remove the offset he will make changes in the data acquisition code now. He will check the gain pin setting in two since he don't have an oscilloscope( Because he belive this might be the case since he is setting the gain of ads1234 by connecting gain 1 and 0 to the digital power of ads1234 since maybe due to digital disturbance he is getting such result hence he will set the gain pin with his arduino uno board.

He have not indicated other connections of ads1234 such as SCLK, DRDY/DOUT, XTAL1, XTAL2, A1, A0, CAP, and CAP since they are digital connections with Arduino. Currently, this whole circuit is powered by Arduino supply 5V and 3.3 V output for analogue power and digital power respectively. pins for gain and speed are always high tied with DVDD.

CS1328347_attachments.zip

Thank you and kind regards,

Gerald

Hi Gerald,

Could I get an accurate schematic?  The one provided is more like a block diagram and it is not all that helpful.  There should be the required caps on the supplies, a 100nF cap across the CAP pins and a low-pass antialiasing filter at each of the ADC inputs.  Also, this appears to be very much a prototyping circuit.  It is nearly impossible to get precision results if there are a number of fly-wire connections between boards.

80sps will have 50/60 Hz power line-cycle noise within the passband of the ADC.  There should be a noticeable improvement by using 10sps.

One further thing is that I'm still not clear about what I'm supposed to be seeing in the data.  I'm seeing a large negative value with the ch0.csv data.  What exactly is this data representing and what should the expected value be?  I have similar questions with respect to the strain guage.csv file as to what is happening and what are the pin settings?

Best regards,

Bob B

Hi Bob,

Please see below for the customer response:
"As I understood from datasheet of ADS1234 CAP need only capacitor connected when not using PGA. SInce I amusing Gain 128 I have not connected it with anything. Can you recommend by any litrature on aliasing filter from texas?( I can find on my own but it would be great if I can find it from texas instruments) Yes this is prototyping circuit , I am still on breadboard using jumper wires to make the circuit work. I need 80 sps for my experiment since the strain machine is a little fast for 10 sps for scanning 3 channel hence effective data rate at 10 sps is 3.3 sps per channel when scanning 3 channel. Please ignore the CSV files for now since I did a lot of on hand experiment to check noise hence I have lost information about this csv file and strain gauge. for more info I am attaching new CSV file where I have shorted input of AINP1 AINN2 to a voltage divider of 1k since that's the bridge configuration.

Since I am using diffrential input ADC does every input needs anti aliasing filter? I am trying to minimize the components used to make this circuit functional(since every aliasing filter requires one opamp hence)"

attachments_1.zip

Thank you and kind regards,

Gerald

Hi Gerald,

The 100nF cap across the CAP is required.  The following details from the datasheet show the benefits of this cap.

Note that this cap benefits in 2 ways.  First as an antialiasing filter with a corner frequency of 720Hz and second to filter the noise from the PGA chopping stage.  If this cap is not installed, this could very well be why there is so much noise.

Have the customer install the 100nF capacitor across the CAP pins and retest.  Hopefully this will adequately reduce the noise and allow a more direct connection to the ADC without the need for additional filter components at the input.  If additional filtering is required, then the filter is required at each of the ADC inputs connected to bridges.

Best regards,

Bob B

Hi Bob,

The customer said he will give it a try in a day, he have one more query here: is this how he should derive voltage value from adc code

PGA setting 128
Vref 3300 mV
FSR = VREF/PGA setting
LSB = FSR/2^23
measured voltage = LSB*ADC output code


Is this the correct formula? Because when he is calculating with this, when adc reaches its positive full scale value(8388607). He is getting value 25.7813 mV and when he set the PGA value as 1 in the formula above he gets the correct value of 3300mV. Can you tell me where he is making mistake here? Thank you.

Kind regards,

Gerald