Part Number: AFE58JD28
Hi, team:
My customer use AFE58JD28, and they found when powering on the first time to configure Coefficient RAM, occasionally some chips Coefficient RAM configuration failures.
There are multiple AFE58JD28 devices on the device, FPGA operation is multiple chips configured at the same time with the same value, only part of the chip is failed, and is random.
In addition:
1. When configuring Coefficient RAM, it has been powered on for a long time, which proves that there is no problem with the power-on timing.
2. configure SPI clock is 3.75M, multiple AFE58JD28 SCLK, SEN, the signal is common on the FPGA side, and the SDIN is a one-to-one relationship on the FPGA side.
3. Configuring Coefficient RAM is done according to specifications
Could you give some debugging suggestions?