Hello
our customer is using the LVDS interface to connect the AFE5818 with a FPGA. LDVS is not AC coupled.
In case the 1.8V Supply of the FPGA rises before the 1.8V_ DVDD-DIG of AFE5818 there is some backbiasing and you can measure about 0.532V at the DVDD_1.8. As mentioned no current limitation of the LVDS.
Any concerns about? I guess this will use the ESD structure. Will this harm the device?
- #1 = 1,8V Supply prior to the load switch for DVDD (will enable during the sequence)
- #3 = 1,8V FPGA (LVDS) supply
- #4 = 1,8V DVDD of AFE.
thanks and best regards
Martin
