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ADS8556 receiving data issue

Aditi Akula
Expert 1440 points

Other Parts Discussed in Thread: ADS8556, ADS8558

Hi,

I have interfaced a ADS8556 with the McASP of TMS320C6713 DSP.

I want to receive all the 6 channel data in the DSP. From the timing diagram of the ADC,

it looks like the frame-sync has to be low for the whole 6-channel data period.

So I have setup the McASP for a 7-slot TDM (16-bit word).

The frame-sync is setup to be active high (one word) and the McASP is active only in the slot 1-7.

I have connected frame-sync from McASP to CONVST_x as well as the FS of the ADC.

What happens if time 't3' from the diagram below is not met?


I am trying to input a 1kHz sine wave to one of the channels (say CH_A0). The clock (SCLK) to the ADC is 500kHz.

When I receive data in the DSP and try to plot it (plotting the first word in every conversion),

I can see some periodic data but not the sine wave as it is.

Also if I apply input to other channel (say CH_B1), I cannot see any data in the 4th place

(the sequence of channels received being CH_A0, CH_A1, CH_B0, CH_B1, CH_C0, CH_C1).

I can only see data in the place of CH_A0, but there is no input to CH_A0 of the ADC.

What could be the problem and where do I look at?

 

The ADC is being used in HW/SW = 0 (HW mode).

Also SEL_A = 1, SEL_B/SEL_C = 0.

 

Thanks,

Aditi.

 

 

  • TI__Guru**** 182731 points

    Hi Aditi,

    I've never tried tying FS to CONVST on the ADS8556, so off the top of my head I can't tell you what might happen.  By the sound of your conversion results though, the device is somehow out of sync and that could be related to your lack of t3 timing.  I'll investigate that for you.  In the meantime, can you post some screen shots of your communication sequence and perhaps the graph of your output data?

  • in reply to Tom Hendrick
    Expert 1440 points

    Tom,

    I am attaching two pictures.

    One of the McASP communication signals, CLK, FS and Data going into the ADC. Let me know if you want to see any other signals.

    The second picture is of the Data which has two parts : 700-pt data and second part is a closer look at the same data.

    Will be awaiting your inputs on this issue.

    Thanks,

    Aditi.

     

  • in reply to Aditi Akula
    TI__Guru**** 182731 points

    Hi again Aditi,

    T3 is a quiet time. It ensures that noise or distortion caused by any data bus access during data read out has ended before the next conversion is started at the rising edge of the CONVST signal. T3 varies with the resolution of the device because the required settling time after any distortion reduces with decreasing resolution. That's why the 16bit device (the ADS8556) has the longest quiet time and the 12bit device (the ADS8558) the shortest.  Tying the FS and the CONVST together could definitely cause performance issues. The point in time where the sample is taken (rising edge of CONVST) is a sensitive moment and any distortion should be avoided. 
    Now, regarding your plots; the scope trace implies there is some data (can't really resolve what it is, maybe 0x03) in A1.  There appears to be data in B0 and B1, C0 appears saturated and there is something in the C1 slot as well.  What channel had an input during this screen capture?  Can you try simply putting a DC level into channels A0 through C1 of say half scale while shorting the other inputs and see if you can verify that the oscilloscope traces follow the correct slot?  Also, if you could zoom in on the rising FS and include BUSY along with one or two data slots, that would help me to verify that your clock to data phase relationship is correct.
  • in reply to Tom Hendrick
    Expert 1440 points

    Tom,

    I will get you the BUSY signal along with the others just in a while.

    Meanwhile I have a couple of questions and clarifications for you.

    1) The data plot above corresponds to only one channel (CH_A0) meaning I plotted every sixth value from my data buffer.

    I can get you the plot of all channel data too. My mistake I did not mention it clearly.

    2) The high period of the FS/CONVST_x signal is about 32 us. From the serial interface timing diagram of ADS8556, "t(conv)" should be max of 1.26 us.

    Will this also cause any problem. Do we have to start reading the bits as soon the conversion is done?

    3) If the timing "t3" is important, can you suggest a buffer/ Delay from TI's line of products that I can use to get a min 40 ns delay

    before tying FS to CONVST_x?

    Thanks,

    Aditi.

  • in reply to Aditi Akula
    Expert 1440 points

    Tom,

    Here you go.

    A plot of the communication sequence.

    The scenario is as follows. I have connected the first 4 channels to +6V DC and the other 2 channels

    did not connect anything. It looks like I am getting all the channel data, only that I was reading them wrongly.

    The thing I dont understand is, I have declared the Rx_buffer to be an array of short ints and if you look

    at the memory, each 16-bit word is 80-bit (5 words) apart.

    Can you help me understand the math here.

    Thanks

    Aditi.

     

  • in reply to Aditi Akula
    TI__Guru**** 182731 points

    Hi Aditi,

    Thank you for the added plots.  The data from the ADS8556 seems correct given your input voltage, so the device is doing what its supposed to do.  I'm not an expert on the McASP receiver structure.  The basic code should load values into the array and then move the offset, but I'm not sure if that is the correct way to interact with the McASP port.  Here are a couple app notes on the McASP peripheral that might help.

    http://focus.ti.com/lit/an/spra870a/spra870a.pdf

    http://focus.ti.com/lit/an/spra921/spra921.pdf

    I also found an example project from CCS3.3 that sets up and uses the McASP on the TMS320C6713 - that's attached to this post.  Have you gotten any assistance from the C6000 forum on the McASP setup?

    mcasp.zip