DAC3283: DAC3283 Phase Match Reg.

Hi Deva,

We have received your response and we will get back to you after Thanksgiving holiday. 

Thanks,

Serkan

Hi Deva,

It is possible to achieve deterministic latency and device synchronization with the DAC3283 and multiple DAC3283 through the dual sync source mode. The synchronization of the devices is with respect to the internal digital logic latency perspective. From an analog core (i.e. the final DAC output stage) perspective, the device to device variation is in the order of 100ps typical. This will exceed your specification of 30ps or less.

I am routing this thread to our Catalog Converter group to see if they have other DAC devices that can meet your less than 30ps requirement. 

Deva,

This is something we have not measured before and would take a lot of time and manpower to do. Then DAC38J84 and DAC38RF82 would probably have better phase matching, as these parts can sample much faster. Both parts provide deterministic latency using JESD204B subclass 1 mode. Below is a screen shot of two outputs from two DAC38J84 devices sampling at 1474.56MHz. 

Please see the document from the link below to assist you with phase matching of multiple converters.

Regards,

Jim

https://www.edn.com/compare-aperture-delay-between-adcs/

Hi Kang Hsia,

Thanks for your reply.

Please reconfirm whether the device to device variation of DAC3283(100ps typical), will it be deterministic/Constant per device or will it vary from power on to power on?

if it is not varying per chip then Is it possible to eliminate this latency with one time calibration?

Thanks,

Deva

Hi Jim,

Thanks for your suggestion.

1.Can you please specify the the device to device variation From an analog core (i.e. the final DAC output stage) perspective for DAC38J84 & DAC38RF82?

2. Is there any DAC with LVDS interface(instead of JESD) for meeting our requirement?

Thanks,

Deva

Deva,

1. We do not have this data.

2. The DAC12DL3200 is a LVDS device that may be an option but we do not have any data regarding phase matching that you are requesting.

Regards,

Jim

Hi Kang Hsia,

Thanks for your reply.

Please reconfirm whether the device to device variation of DAC3283(100ps typical), will it be deterministic/Constant per device or will it vary from power on to power on?

if it is not varying per chip then Is it possible to eliminate this latency with one time calibration?

Thanks,

Deva

Hi Deva,

the 100ps of timing variation is mostly a process variation from part to part. There are temperature variations factor and thus you will need to create a calibration table vs. temperature as well.

Hi Kang Hsia,

Thanks for your Reply.

"the 100ps of timing variation is mostly a process variation from part to part"

As this is major requirement to us, please reconfirm whether the variation remains same for every power ON under constant voltage & Temperature(Should not vary with time). So that we can eliminate the variation like you said by creating a table to maintain phase deviation<30ps across devices.

Thanks in-advance,

Deva