Other Parts Discussed in Thread: SN74AXC4T774
There's no information in the datasheet for default values for the CMOS IO threshold values. I'm looking to interface this DAC with a 1.8V IO FPGA bank
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There's no information in the datasheet for default values for the CMOS IO threshold values. I'm looking to interface this DAC with a 1.8V IO FPGA bank
Good Morning,
Page 22 of the datasheet Shows the default value for register CONFIG26. Bit 7 (io_1p8_3p3) has a default value of 0, indicating 3.3V IO is default. You'll need to program bit 7 of CONFIG26 to 1 to use with a 1.8V FPGA.
Regards,
Matt
Thanks for the help Matt. So I need a level shifter to set the threshold to 1.8V? Interesting
Hi Nicholas,
Yes, it seems that is the case. We suggest to use a level shifter to convert 1.8V to 3.3V and to simply use this device with IO levels set to 3.3V. An example level shifter which we use often for SPI is the SN74AXC4T774.
Regards, Chase