Hello support team,
Why does DAC088S085 have max value of TSS "SYNC set-up time before SCLK falling edge"? What happen if TSS can't meet TSS max value?
Thanks,
Koji Ikeda
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Hello support team,
Why does DAC088S085 have max value of TSS "SYNC set-up time before SCLK falling edge"? What happen if TSS can't meet TSS max value?
Thanks,
Koji Ikeda
Hi Ikeda-san,
Please take a look at this previous forum post about the same topic:
If SYNC is brought low too close to the previous falling edge, it could count that as the first clock and the data sequence would be shifted incorrectly. The forum post I linked has a few images that might make this more clear.
Reach out if you have any follow-up questions.
Best,
Katlynne Jones