• State TI Thinks Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 46 subscribers
  • Views 308 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8694: ADS8694

ttd
Mastermind 8750 points
Part Number: ADS8694


Dear Technical Support Team,


I have a question about "ts" in "7.6 Timing Requirements" on page 10 on the  datasheet of ADS8694.

The ADS8694 has "Command Register" and "Program Register".
"Command Register" has an access time of 34 SCLKs, and "Program Register" has an access time of 24 SCLKs.

In Figure 1 of Page 10, a picture based on 34 CLK is drawn.
Is the "MIN 2μs" for "ts" that assumes "Command Register"?
Or is it the common value for "Program Register"?
If "Program Register" is different, what is the value for "Program Register"?

Best Regards,

ttd

  • 0
    TI__Guru**** 182011 points

    Hi ttd,

    The ADS8694 is a 500kSPS converter.  The ts value of 2uS is the overall ADC cycle time (500kSPS), so it holds for either a program or command register cycle.  In one case (as shown in Figure 1) there would be 34 clocks, otherwise it would only be 24 - the MIN ts value would not change.  See Figures 91 and 92 for Program write/read cycles, while not specifically called out, the time between falling /CS inputs would still be 2uS.

  • 0 in reply to Tom Hendrick
    Mastermind 8750 points

    Hi Tom,

    Thank you for your reply.

    According to the datasheet, Program Read/Write is enabled on the falling edge of /CS, and /CS is started up after the falling edge of 24 SCLKs to make a single cycle.

    The "ts" is the ADC cycle time when the ADC is running, and since the ADC is in Stanby mode during Program write/read, so is "ts" not applicable?
    Your answer says that it also applies to program write/read, which raises the question of whether this is valid when the ADC conversion is stopped.
    If this is valid, then the datasheet should specify the CS interval as ts even during program write/read.

    Please tell me the reason why the CS interval for program write/read needs to be ts.For example, the timing for writing to a register is the 16th falling edge or 17th rising edge of the SCLK, and the readback of the contents written to that register is completed at the 24th SCLK.

    --------------

    For a write cycle, the next eight bits (bits 7-0) on SDI are the desired data for the addressed register. Over the

    next eight SCLK cycles, the device outputs this 8-bit data that is written into the register. This data readback

    allows verification to determine if the correct data are entered into the device.

    -------------

    Best Regards,

    ttd

  • 0 in reply to ttd
    TI__Guru**** 182011 points

    Hi ttd,

    If all you are doing is writing to and reading from the registers, you need the 24 SCLKs and the minimum /CS high time noted as tPH_CS.  In this case, ts does not really apply.