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DAC8718 Sequencing

Paul Barker
Prodigy 265 points
Other Parts Discussed in Thread: DAC8718

According to the datasheet there are 5 voltage inputs that need to be sequenced on the DAC8718 in the correct order:

IOVDD, DVCC, AVDD, AVSS, VREF

This complicates power supply, and LDO sequencing in my design.

For example in my design the VREF IC that is recommended does not have an Enable pin on it so it comes up when DVCC comes up, so this requires extra ICs to gate power to the the REF IC. 

Is there any flexability to the power up sequencing on the DAC8718?

For example could I do: DVCC, VREF, IOVDD, AVDD, AVSS?

Best Regards,
Paul Barker

  • 0
    TI__Mastermind 43915 points

    Hi Paul,

    How much delay between the supplies are you expecting to have? Are you expecting a few ms delay from supply to supply or more like a few seconds or longer? On our evaluation platform, we use a triple DC supply to power the high voltage rails and 5V. Our motherboard uses some LDO regulators to create 3.3V and 1.8V from the 5V supply to power the digital. The reference is also powered from the 5V supply. When it comes to powering up the supplies, we have some slight delay from supply to supply as it takes some time for everything to power up and stabilize and I have never experienced any kind of problems. I have seen some parts where if you do not follow the power supply sequence, you may see excessive current draw until all the supplies are up and stable.

    Regards,

    Tony Calabria

  • 0 in reply to Tony Calabria
    TI__Prodigy 265 points

    Hi, thanks for the quick reply.

    On my design the +5V will come up first which powers a MSP430, 2.5V REF, and the DAD8718 DVCC.  Then I use the built in 3.3V LDO in the MPS430 to power up the IOVDD on the DAC8718.  My AVDD and AVSS are powered by LDOs that have enables that are controlled from the MSP430, so I can sequence them on after everything else.

    My Sequence:

    1) DVCC & VREF
    2) Delay few milliseconds
    3) MSP430 generates IOVDD
    4) MSP430 then enables AVDD & AVSS up to 100 ms later
    5) MSP430 initalizes all digital inputs to the DAC8718 to select proper modes

    One other question: Are some of the digital inputs, on the DAC8718, only sampled at power up or can I initalize them later after everything is powered up?

    Regards,
    Paul Barker

     

     

     

      

     

  • 0 in reply to Paul Barker
    TI__Mastermind 43915 points

    Hi Paul,

    The digital I/O pins; USB/BTC, RSTSEL, /CLR etc. are not latched in only at power up. You can power up the DAC and then set the static lines accordingly to have the data format, RSTSEL, etc. set as desired. Let be double check with the designer about how critical the power supply sequencing is and I will get back to you.

    -Tony

  • 0 in reply to Paul Barker
    TI__Mastermind 43915 points

    Hi Paul,

    Regarding the power supply - We have seen some issues that include higher current draw from the digital I/O pins, the clock lines, etc. in addition to functionality mishaps, such as power up to midscale when set to zero scale, when the supply sequence is not followed. In some parts (not necessarily the DAC8718), we have run across problems where the OTP may not be initiated properly causing the DAC to heavily misbehave. I have seen problems when the reference is applied before the part is fully powered. If you could minimize the delay time between DVdd and IOVdd (try to keep it under a ms) and have the ability to delay the power up of the REF to come up after the high voltage supplies, you should be alright. 

    Regards,

    Tony Calabria

  • 0 in reply to Tony Calabria
    TI__Prodigy 265 points

    Hi Tony,

    I have a seperate +5V LDO for my analog and digital power so I'm able to power up MSP430 with one +5V LDO and then later sequence on the +5V LDO for analog which the 2.5V REF runs off of along with some other analog circuitry.  Doing this I will be able to sequence the 2.5V REF after the high voltage rail supplies.  Thank you for all your help.

    Regards,
    Paul Barker