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ADS1015: ADDR pin slave address setting

Conor
Guru 12235 points
Part Number: ADS1015

Hi,

I am considering connecting four ADS1015 to one I2C bus. The data sheet states that the ADDR pin can set each slave address with GND, VDD, SCL, and SDA.

1) When is the slave address set? Is it when the power is turned on? I couldn't quite understand from the data sheet how SCL and SDA are judged.

2) There is the following description in the DataSheet, but I do not understand it, so could you explain it as a supplement?
----
If SDA is used as the device address, hold the SDA line low for at least 100 ns after the SCL line goes low to make sure the device decodes the address correctly during I2C communication.
----

Thanks,

Astro

  • 0
    TI__Mastermind 18900 points

    Hi Astro,

    The primary expert is out this week so I ask for your patience for follow up questions.

    Conor said:
    1) When is the slave address set? Is it when the power is turned on? I couldn't quite understand from the data sheet how SCL and SDA are judged.

    The datasheet says "The state of address pin ADDR is sampled continuously". So, it'll be sampled at power up and during run time. 

    Conor said:
    2) There is the following description in the DataSheet, but I do not understand it, so could you explain it as a supplement?
    ----
    If SDA is used as the device address, hold the SDA line low for at least 100 ns after the SCL line goes low to make sure the device decodes the address correctly during I2C communication.
    ----

    There's 4 options that you can connect ADDR to. If you connect it to SDA, which is both an input and an output, it is recommended to hold SDA low for 100ns after SCL goes low. This because ADDR is sampled during run time and most of the transitions on SCL is where data is read. So, if the address is dynamically changed during run time after an I2C transaction, you should hold it low for 100ns after the transition.

    That is the intent from what I can tell. If you have a follow up question, I'll wait for the expert. 

    Best,

    -Cole

  • 0 in reply to Cole Macias
    Guru 12235 points

    Hi, Cole

    >This because ADDR is sampled during run time and most of the transitions on SCL is where data is read. So, if the address is dynamically >changed during run time after an I2C transaction, you should hold it low for 100ns after the transition.

    I couldn't understand what you meant above. Could you please explain the details?

    Thanks,

    Astro

  • 0 in reply to Conor
    TI__Guru** 113765 points

    Hi Astro,

    The ADS1015 checks the address when the START condition is initiated.  The START condition takes place when SDA goes low followed by SCL which at that time latches the designated address into the device.  Due to internal device propagation delays there is a requirement to hold SDA low for a minimum of 100ns following SCL going low.

    This is not usually a problem with most micro peripherals unless the micro is operating with a high-speed clock.  FPGAs will often require a delay here as well due to the internal clocking speeds of the device.  If the I2C START holds for the minimum time requirement you should see no issues when using SDA as the address selection.

    I would suggest using one of the other address selections if you have concerns.

    Best regards,

    Bob B

  • 0 in reply to Bob Benjamin
    Guru 12235 points

    Hi, Bob

    It turns out that the timing of setting is at the time of StartCondition. In other words, is it correct to understand that the SCL and SDA timings at StartCondition are continuously sampled and judged?
    Is it correct to understand that there is no particular need to implement the operation for setting as long as it conforms to the I2C bus standard?

    Cole Macias said:
    The datasheet says "The state of address pin ADDR is sampled continuously". So, it'll be sampled at power up and during run time. 

    Also, how does this IC make judgments as a timing chart at power-on?
    When the power is turned on, are the SCL and SDA timings shifted and the pulses output?

    Thanks,

    Astro

  • 0 in reply to Conor
    TI__Guru** 113765 points

    Hi Astro,

    I'm not quite sure what you are asking.  You should not be randomly setting the address.  The address is meant to be set to a particular setting and there are four possible address selections (VDD, GND, SDA and SCL).  The fixed states of VDD and GND I think are pretty self explanatory.  Where there may be some confusion is if SCL or SDA is used for the address as these signals are changing states.  Cole's comment is a little misleading in that the ADDR pin is sampled continuously while the device is powered, but it is not determined until the START condition takes place.  So the state of the ADDR pin is internally latched at the time of the I2C START condition and every time the START condition is initiated.   As the START condition is unique (SDA going low followed by SCL going low) the internal circuitry requires logic to determine the state of the pins of SDA and SCL as well as the value of the state of ADDR.

    You may be over thinking how the part works.  Just set the desired address and don't be concerned about the ADS1015 and how it determines the address.  On power up the device does not send any I2C response as it is a target device and not a host.  The ADS1015 will only decode the address when a START condition is sent from the host device.

    To avoid the timing issue with SDA, use VDD, GND and SCL as address selections first.  If SDA must be used for an address, then make sure that following the START condition the SDA holds low for a minimum of 100ns before the SDA goes back high following SCL going low.  The timing issue is unlikely to occur, but because we know it can happen the information is in the datasheet.

    Best regards,

    Bob B