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ADC128S102: SCLK Frequency Specification

Part Number: ADC128S102

Hi,

I see in the datasheet it list the minimum SCLK frequency as 8MHz and the maximum frequency of 16MHZ. It also list the typical of 800KHz.

Am I to assume that Ti recommends that you should operate this ADC in the 8-16MHz range but you may be able to run it as low as 800KHz? Is it only guaranteed from 8MHz-16MHz?

Can you please help me in understanding this clock spec?

Thanks!

  • Hi Matty,

    The ADC128S102 shows BOLD text under the various Electrical Characteristics tables that show the applicable test conditions.  That text shows you we've characterized the part in the 8MHz to 16MHz range of SCLK and the various entries to the tables are valid for that range of SCLK frequency.  So, yes - we guarantee performance with SCLK from 8-16MHz and you can run down to 800k SCLK for proper operation of the part.  At slower SCLK speeds, you can start to have bleed off of the sample/hold cap due to parasitics which will impact the device performance.

  • Ok so all of the specs like Tsu and Th are spec'd between 8MHZ and 16MHZ. The datasheet says you can run as low as 800KHz but those specifications like setup and hold times (for example) don't apply. Do I have that correct?

    Would the setup and hold times increase at the lower clock rate so that you would need more setup and more hold for example?

    Thanks!

  • Hi Matty,

    The setup and hold times of the ADC128S102 would remain the same regardless of the SCLK speed.  If there is any particular timing you have concerns about with an 800kHz SCLK, just let us know.