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tvp7002 Vertical Sync offset

Keith13636
Intellectual 305 points

Other Parts Discussed in Thread: TVP7002

I am using a tvp7002 with the DM368 on linux  2.6.32.17.  Our video source is a Sony FCB-EH4300 camera running 1080i video. 

The video we are capturing has a black bar at the top.   Our captured data contains the Vertical blanking period.  I have tried changing  the following lines in tvp7002.h

 

#define VBLK_F0_START_LINE_OFFSET_1080i 0x02

#define VBLK_F1_START_LINE_OFFSET_1080i 0x02

I can use any number from 1 to 255 and the bar ends up farther down in the image rather than the top.  How do I tell the system the valid data starts later rather than earlier.  
I tried using the resizer on the dm368 but this slowed down the frame rate from 30 fps to 15 fps.  I guess the resizer can't keep up.  I would rather align the video rather than cropping it anyways.

 

  • 0
    TI__Genius 16810 points

    Keith,

    Is your 1080i camera outputting standard 1080i with tri-level sync on Y?

    The VBLK offset registers that you are changing do alter the start of the embedded V-bit.  You may want to also try changing VBLK duration which affects start of active lines.  Below are embedded sync setups that we have used for a standard 1080i input.

    //embedded syncs
    //Delay factor = 27 for internal process delay
    WR_REG,TVP7000,0x01,0x40,0x07 // AVID Start  263 (236+27)  for SOG filter differnence
    WR_REG,TVP7000,0x01,0x41,0x01 // AVID Start
    WR_REG,TVP7000,0x01,0x42,0x8B // AVID Stop  2187 (AVID start + 1920 + 4)
    WR_REG,TVP7000,0x01,0x43,0x08 // AVID Stop

    WR_REG,TVP7000,0x01,0x44,0x02 // VBLK F0 Offset
    WR_REG,TVP7000,0x01,0x45,0x02 // VBLK F1 Offset
    WR_REG,TVP7000,0x01,0x46,0x16 // VBLK F0 Duration
    WR_REG,TVP7000,0x01,0x47,0x17 // VBLK F1 Duration
    WR_REG,TVP7000,0x01,0x48,0x00 // F-bit
    WR_REG,TVP7000,0x01,0x49,0x00 // F-bit