Other Parts Discussed in Thread: AFE58JD28,
Dear Sir
Difficulty synchronizing 8 pieces of AFE
For our portable color Doppler ultrasound project, 8 pieces of AFE cannot be synchronized according to the following initial configuration and process
Note: Monitoring several lane syncs in a single core is fine; When multiple cores are placed on one block, it is difficult to synchronize (it takes several minutes to synchronize).
Note: There is no problem with 8ADC/LANE at 25Mhz sampling rate; Desktop press 50MHZ, 4ADC/LANE also does not have this problem;
Notebook with this configuration (8 pieces AFE58JD28, total 16x LANE) :
8-ADC/LANE, 50MHZ sampling rate
FRAME:F=12-BYTE; MULTI-F:K=2; ADC RES:12; SER RES:12
1. PIN RESET;
2. Configure the following register values of AFE:
Serial number offset value description
REG1 1H 0X0034 Shut down LVDS and shut down JESD Interface.
REG115 73H 0X0010 Configuring JESD Version Configurable.
REG3 3H 0X0010 JESD SerRate is set to 12 by default.
REG4 4H 0X0000 Set ADC resolution to 12.
REG73 49H 0X1800 ILA Mode is configured.
REG74 4AH 0X1000 Configuring the CGS mode.
REG75 4BH 0X0020 NAL=8;
REG80 50H 0X0002 JESD PLL Enhanced Current Mode is configured.
REG85 55H 0X4020 Configures JESD as Subclass 2 of JESD204B.
REG65 41H 0X8000 -> Wait for 10us-> 0X0000; PLL1 reset
REG66 42H 0X8000 -> Wait for 10us-> 0X0000; PLL2 reset
REG1 1H 0X0074 Stops LVDS and enables JESD Interface.
3. FPGA: Set FPGA JESD204B CORE parameters
The address 5A A5 80 08 04 00 00 00 2C is assigned to the value 5A A5 80 08 04 20 00 00 00 02 subclass 2
4, FPGA: AFE TRIG positioning -> JESD CORE reset -> Trigger the TRIG high pulse (24ns) and then wait for the JESD16X link to synchronize and align
