This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DAC8740H: What is the depth of FIFO of DAC8740H in FF/PA UART interface?

Part Number: DAC8740H
Other Parts Discussed in Thread: PROFIBUS, , DAC8741H

    Hi, I want to know the depth of FIFO (transmit & receive) of DAC8740H in FF/PA UART interface. I can't find relevant information in the “DAC874xH HART? and FOUNDATION Fieldbus? and PROFIBUS PA Modems datasheet (Rev. D).pdf” document.

thank you!

  • River,

    The DAC8740H only has UART interface and does not use a FIFO. Data coming in on MOD_IN (or MOD_INF) is placed on the UART_OUT and any data going from UART_IN is placed on MOD_OUT.

    The FIFO is implemented in the DAC8741H and communication with HART or FF/PF is accessed through SPI communication to reach the register based FIFO.

    Joseph Wu

  • Hi,Joseph Wu.
        Thank you for your prompt reply! There is no FIFO for receiving, I am understandable. But the sending should have a FIFO, which can be found on pages 19 and 20 of the “DAC874xH HART and FOUNDATION Fieldbus and PROFIBUS PA Modems datasheet (Rev. D).pdf” document, as shown in the yellow part of the screenshot below.
    So please help me confirm How many bytes are there in sending FIFO? Thanks!


    RiverPage19page20

  • River,

    I had to check with a digital designer here to get this information. The DAC8740H running PAFF does use the FIFO buffers. There are FIFO buffers for both input and output data (again when running PAFF). The depth of the FIFO is the same as the FIFO for the DAC8741H using SPI, that is 16 bytes in each direction.

    Sorry about the confusion. I don't get many questions about the PAFF mode in this device.

    Joseph Wu

  • Joseph Wu. Thank you for your prompt and definite reply!ThumbsupThumbsup