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ADS7830: ADS7830 I2C issue

Zhang Liang
Genius 4435 points
Part Number: ADS7830


Hi,

We use the ADS7830 for the voltage sampling in our new project, and now we have the below issue for the I2C bus:

1. We use the ARM MCU for the I2C matter and the ADS7830 for the I2C slave, and now, the MCU send out the ADS7830 address and there are no ACK signal feedback;

2. The waveform as below:

3. Based on the above, we send the address signal again, there is the ack signal feedback and the ADC is normal;

4. We test other board, and this issue is only for the first power on, and we consider this is the probability event;

5. And we check our schematic diagram and we have no idea if there are any error, the schematic diagram as below:

               

6. Plesae kindly review above schematic diagram and share your comment how to solve this issue, thanks.

  • 0
    TI__Mastermind 26348 points

    Liang

    1. One concern is that the i2c communications for the bad communications only has 8 clock pulses. A normal I2C transaction has 8 data clocks and one clock for acknowledge.  Can you explain why your transaction does not have 9 clocks?  Are you using an built in i2c control module or are you “bit banging” i2c.
    2. Another concern is the i2c address control pins (A0, A1) are connected to digital control lines. Normally these pins are connected to a fixed logic level (high=VDD, LOW=GND).  For debug, can you try connecting these pins permanently to GND.

    I hope we can quickly resolve your issue. 

    Best regards,

    Art

  • 0 in reply to Art Kay
    Genius 4435 points

    Hi Art,

    Please refer to below reply:

    Item#1: We are using "bit banging" i2c,There are only 8 clocks because the master(controller:ARM processor) is waiting for the slave(ADS7830) to pull the SDA signal low (waiting for the slave to send an ack response);

    Item#2: The A0/A1 pins are connected directly to GND;

  • 0 in reply to Zhang Liang
    TI__Mastermind 26348 points

    Zhang,

    1. Is the i2c bus powered up before the device? Doing this can cause abnormal operation and technically violates the abs max specifications. Alternatively, if there are transients on the digital inputs during power up these may be interpreted as digital data and potentially put the device into a bad state.  In any case, I think something is happening on power up that gets the device into a bad state.  You may want to send an i2c general call reset (General Call, (0000 0000), sending 0000 0110 (06h) as the second byte causes a software reset) after power up.
    2. Regarding item 1, you could place a scope on SCL and SDA and Vdd during power up to see if you find transients or if the i2c powers before the Vdd.
    3. I recommend always using a standard i2c frame. In other words, have the master issue a clock pulse for acknowledge regardless if the slave acknowledges or not.  Sending 8 clocks without the acknowledge clock is not a normal i2c transaction.  I do agree that the ADS7830 should have pulled SDA low on your first waveform, but you should not neglect to send the 9th clock in this case.  This is especially true if multiple i2c devices are sharing a bus as this is an abnormal i2c transaction. 
    4. In summary, I think something is putting the device into a bad state after power up. Ideally, you should identify the issue and correct it.  However, alternatively, clearing the error should allow for good i2c communications going forward.

    Best regards, Art