Part Number: DAC38J84
Other Parts Discussed in Thread: LMK04828,
Hi everyone,
I am trying to use DAC38J84 at it's highest sampling rate. There are 8 JESD lanes on my board which works at 10Gbit/s. I use LMK04828 as a clock source.
I can use the DAC at 1GS/s, but I couldn't figure out how to use it at 2GS/s.
Here is my configuration for 1GS/s:
LMK04828 generates 1GHz for DAC's clock inputs and I don't use PLL. Therefore, I choose 1GHz as a clock reference using serdes_refclk_sel , then I divide it by 2 to get 500MHz, because datasheet says 300-800MHz is the optimal frequency for the SerDes PLL. I set MPY to 5x to get 2.5GHz at SerDes PLL output and I set interpolation to 1. So, in this configuration DAC can work at 1GS/s, but I couldn't get 2GS/s or higher using interpolation.
What should I do to get 2GS/s or higher, and which registers should I change. I changed interpolation from 1 to 2 but it didn't work.
My registers for 1GS/s
0x3B => 0x0800 => external clock selected and divided by 2
0x3C => 0x0028 => Set MPY to 5
0x25 => 0x2000 => Set JESDCLK divider to 2
0x00 => 0x0018 => Set interpolation to 1
My registers for 2GS/s
0x3B => 0x0800 => external clock selected and divided by 2
0x3C => 0x0028 => Set MPY to 5
0x25 => 0x4000 => Set JESDCLK divider to 4
0x00 => 0x0118 => Set interpolation to 2
Thanks in advance.
