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ADC3644: Understanding Output Bit Mapper

Kelsey Schneider
Prodigy 30 points

Part Number: ADC3644

I'm having trouble understanding how the output bit mapper works. On page 38 of the ADC3644 data sheet, figure 8-37, gives you an example of the output mapping. The output on the right has an example cell of D0A (0x63, 0x54). I understand that 0x54 is the unique identifier and based on D0A, it is channel A, but I am confused about what 0x63 represents. I thought it was supposed to represent the channel A address location for that identifier, but below there is a paragraph that states Channel A has address from 0x39 to 0x60. 0x63 is outside of this scope. Can someone please explain what that other value represents?

  • +1
    TI__Genius 15321 points

    Hi Kelsey,

    Your understanding is correct - the confusion is just coming from the datasheet not being clear below Figure 8-37 that it is no longer referring to parallel CMOS mode. If you are running in parallel DDR, the 0x54 is the unique identifier for D0A, as you mentioned.

    The paragraph after the example in Figure 8-37 is referring to the 2w serial CMOS configuration. If you look at Figure 8-38, you can see that the registers span from 0x39 to 0x60 for CHA and 0x61 to 0x88 for CHB (referring from the DA6 on the far bottom right side to DA5 on the far top left side, and vise-versa for CHB). 

    Regards, Amy