AMC7834EVM: SPI Programming

Hi Allan,

The SDM-USB-DIG and this GUI are pretty old and I am not super familiar with them. I'd expect the change in frequency is due to some limitations of the SDM-USB-DIG drivers. 

Is the customer using the SDM-USB-DIG with their own driver, or some other controller? Was their drive working before and now it's not working? 

Best,

Katlynne Jones

Hi Katlynne,

There is no problem to operation our GUI but the main issue is customer can't read/write with their driver. 

Some further questions need your help to clarify.

1. here is the error log when using custom driver to read REG 0x04

Use SDM-USB-DIG with EVM to read REG 0x04. SCLK is set to 960Khz

2. Customer want to have 1.8V for SPI and short shunt 2-3 at JP14 on the EVM. SDO is 1.8V as expected  however, do you have any idea why /CS, SDI and SCLK are 2.4V?

3. Still want to clarify why there are two SCLK frequencies, 500Khz or 1.25Mhz? Which one shall customer to follow? Is one for SDI, one for SDO?2e

4. when CPU pull low /CS, SDI start receiving, but no feedback from SDO to CPU. Is there anything missed?

5.  what's the first bit to defined read/write? Shall the following address of read/write clocked out at rising/falling?

Regards,

Allan

Hi Allan, 

Is the customer using the SDM-USB-DIG with a customer driver, or some other controller? If the latter, make sure all supplies are being supplied to the EVM, including VDUT. See this forum post addressing that: https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/945220/amc7834evm-confirm-if-it-is-okay-to-use-amc7834evm-without-sdm-usb-dig-board

It seems like the issue might be supply related based on your second question. 

2. The logic level of the SPI signals (CS, SCLK, SDI) are determined by the controller. So it is important to know if they are using the SDM-USB-DIG or some other controller. The signals are connected directly to the AMC through J4. The IOVDD input voltage is used as a pullup for other digital signals, but it won't determine the level of the SPI signals. 

3. I don't have access to the GUI source files, so I don't know why two different clock frequencies are used. It isn't required to use a certain frequency for read or write based on the AMC7834 datasheet, so this must be specific to the SDM-USB-DIG. The maximum frequency for an IOVDD of 1.8V is 10MHz:

4. It seems like there is an issue with the communication in general. if the AMC hasn't successfully received any data then it wont enable SDO and return data. They can try confirming that writes are working before moving on to reads. Do this by sending a write command to enable/disable the internal reference and measure the voltage on the REF_OUT pin. If the voltage doesn't change then we will know SPI communication is not working at all. If the voltage does change then we know the probably is only with read commands. 

5. The R/W bit is the very first bit of the sequence, before the register address. 

For writes, the data should be clocked out by the controller on the falling edge, and the data is clocked in by the AMC on the rising edge. For reads, the AMC clocks data out on the falling edge and the controller should clock it in on the rising edge. Please make sure the controller is configured correctly based on these details. 

Best,

Katlynne Jones

Hi Katlynne,

2. We are using EVM board, disconnect SDM-USB-DIG from J4, and connect other controller to J4, SDO is 1.8V as expected, but /CS, SDI and SCLK are still 2.4V.

Gordon

Hi Gordan, 

Thank you for the details. What controller are you using? What are the logic levels on the external controller's SPI signals before connecting it to the AMC EVM? 

Best,

Katlynne Jones 

Hi Katlynne,

Customer finally can read/write the registers. However, they couldn't get ADC READY state after initialization. 

Do you have an example bring up code can share with customer as a reference? 

Regards,

Allan