• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 46 subscribers
  • Views 223 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DAC8775: Slew Time Calculation

PY (Pengyu) Song
Expert 5860 points

Part Number: DAC8775

Hi team,

On equation 8, can you please help give an numerical example on how to calculate the slew time? For example - 

  • Output change = -10V to +10V, i.e. 20V. 
  • Step Size = 8 LSB (SR_STEP[2:0] = 011). 
  • Update Clock Frequency = 200,000Hz (SRCLK_RATE[3:0] = 0001). 
  • LSB Size = Full Scale Range / 2^16 = 20V/2^16. 
  • Slew Time = 20/(8*200,000*20/2^16) = 2^16/(8*200,000) = 0.04096 sec = 40.96ms ==> this looks too long and incorrect. 

  • +1
    TI__Guru* 99615 points

    PY,


    Your calculation of 40.96ms looks correct to me.

    You can calculate the slew time this way, or do it another way to get the same result. I started with the step size of 8bits. Because the 20V step is the full scale, there will be 2^16/8 total steps to go through 20V. This is 8192 steps.

    The clock frequency is 200kHz, so each clock period is 5us. To go 8192 steps at 5us each is a total of 40.96ms.


    Joseph Wu